QUANTA STRATOS S210 Series S210-X12RS Technical Manual page 62

I H
NSTALLING ARDWARE
Important:
a*: Supported but not validated.
b*: Supported and validated.
c*: Supported with limited validation
Table 2-2: LR-DIMM Support (Reduced Length)
R
ANKS PER MEMORY
&
DIMM CAPACITY PER
DATA WIDTH DIMM
QR x 4
a*
16
6
(DDP) *
8R x 4
a*
32
6*
(QDP)
a*: Supported and Validated
1*: Physical Rank is used to calculate DIMM Capacity.
2*: Supported and validated DRAM Densities are 2Gb and 4Gb.
3*: Command Address Timing is 1N.
4*: The speeds are estimated targets and will be verified through simulation.
5*: QR: For 3DPC – Rank Multiplication (RM) = 2
8R: For 2DPC and 3DPC – Rank Multiplication (RM) = 4
6*: QDP – Quad Die Package DRAM stacking.
( / ) &
SPEED MT S VOLTAGE VALIDATED BY SLOT PER CHANNEL
1, 2*
(GB)
1 Slot per
Channel
1 DPC (V) 1 DPC (V)
1.35 1.5 1.35
1066,
1066, 1066,
1333,
a*
1333, 1333,
32
1600,
1600 1600
1866
a*
1066 1066 1066
64
Note:
1*: Supported DRAM densities are 1Gb, 2Gb, and 4 Gb. Only
2 Gb and 4 Gb are validated by Intel.
2*: Command Address Timing is 1N.
3*: QR RDIMM are supported but only validated by Intel/PMO in a
homogenous environment. The coverage will have limited system
level testing, no signal integrity testing, and no interoperability testing
The passing QR RDIMMs will be web posted.
2 Slots per Channel
2 DPC (V) 1DPC (V)
1.5 1.35 1.5 1.35
1066,
1066, 1066, 1066,
1333,
1333, 1333, 1333,
1600,
1600 1600, 1600
1866
1066 1066 1066 1066
DDP – Dual Die Package DRAM stacking.
P – Planer monolithic DRAM Die.
2-24
M
EMORY
3,4,5*
(S ) & ( )
PC DIMM PER CHANNEL DPC
3 Slots per Channel
2DPC (V) 3DPC (V)
1.5 1.35 1.5 1.35 1.5
1066,
1066, 1066,
1333,
1333, 1333, 1066 1066
1600,
1600 1600
1866
1066 1066 1066 1066 1066
P R
OPULATION ULES