Dram Clock/Drive Control; Dram Clock; Dram Timing; Read To Precharge (Trtp) - VIA Technologies EPIA-P700 User Manual

EPIA-P700 User's Manual

DRAM Clock/Drive Control

DRAM Clock/Drive Control
DRAM Clock/Drive Control DRAM Clock/Drive Control

DRAM Clock

The chipset supports synchronous and asynchronous mode between host
clock and DRAM clock frequency.
Settings: [By SPD, 200MHz, 266MHz]

DRAM Timing

The value in this field depends on the memory modules installed in your
system. Changing the value from the factory setting is not recommended
unless you install new memory that has different performance rating than
the original modules.
Settings: [Manual, Auto By SPD]

Read to Precharge (Trtp)

Settings: [2T, 3T]

Write to Read CMD (Twtr)

Settings: [1T/2T, 2T/3T]

Write Recovery Time (Twr)

Settings: [2T, 3T, 4T, 5T]
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