Circuit Description; Clock/Calendar Block Diagram - NEC Advanced Personal Computer System Reference Manual

2.9.1 Circuit Description
As shown in Figure 2-27, the clock generator is driven by a 32.768 kHz crystal
oscillator. Should a power break occur, system battery power prevents calendar-
and-clock data loss. A 14-pin IC encloses all functions.
74LS174
ADO
TO
- - - - - ' ' ' ....... ~ 6 BIT
----.v
LATCH
AD7
A
CS
r - -
CONTROL
I -
LOGIC
+5
v'"
~
VDD
SUPPLY
.b
CIRCUIT
-
J
-
BATTERY
BATTERY
VOLTAGE
CHECKER
-
74LS367
J o - - - - - - - - - - - - I
Figure 2-27 Clock/Calendar Block Diagram
/-1 PDl990A
co
TO XL
.1
II--
C2
STB
Cl
-
T
XL It----<
CLK
32.768 kHz
Dl DO
CS
~
DE
VDD G
I
7.7
VDD
LED (GREEN)
~+5V
J
Processor PCB
2-43