Interrupt Control Block Diagram - NEC Advanced Personal Computer System Reference Manual

IRO TO IR6
lNTA
AO
lOW
lOR
CS
IR7 TO lRl4
CS
7
8
00 TO 07
MASTER
8
INT
IRO TO IR6
--
INTA
AO
00 TO 07
WR
RO
CASO TO
CS
CAS2
8
SLAVE
IR
INT
-
L., INTA
--
AO
-
WR
00 TO 07
-
RO
CASO TO
CS CAS2
Figure 2-14 Interrupt Control Block Diagram
Table 2-4 Interrupt Lines
INTERRUPT
DEVICE REQUEST LINE ASSIGNMENT
Master IRa
Not used
IRI
Communication
IR2
Not used
IR3 Timer
IR4 Keyboard
IR5
Not used
IR6 Not used
Slave
IR7 Printer
IR8 Not used
IR9 Not used
IRlO CRT
IRil FDD
IRI2 Not used
IRI3 Not used
IRI4 APU
Processor PCB
TO THE PROCESSOR
INTERRUPT
VECTOR BYTE
T7 T6 T5 T4 T3
a a a
T7 T6 T5 T4 T3
a a
I
T7 T6 T5 T 4 T3
a
I
a
T7 T6 T5 T 4 T3
a
I I
T7 T6 T5 T4 T3 I
a a
T7 T6 T5 T4 T3 I
a
I
T7 T6 T5 T4 T3 I I
a
T7 T6 T5 T4 T3
a a a
T7 T6 T5 T4 T3
a
0 I
T7 T6 T5 T4 T3
a
I
a
T7 T6 T5 T4 T3
a
I I
T7 T6 T5 T 4 T3 I
a a
T7 T6 T5 T4 T3 I
a
I
T7 T6 T5 T4 T3 I I
a
T7 T6 T5 T4 T3 I I I
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