Table of Contents
Advertisement
Processor PCB
Table 2-2 DMA Instructions (cont'd)
INSTRUCTION
READI
I/O
DATA BUS
WRITE
ADDRESS
7
6
5
4
3
2
I
0
R
C
C
Write RQ Register
W
19
-
-
-
-
-
B
S
S
I
0
M
C
C
Write Single Mask
W
OB
-
-
-
-
-
K
S
S
I
0
M
M
M
M
Write All Mask
W
IF
-
-
-
-
B
B
B
B
3
2
I
0
R
R
R
R
T
T
T
T
Read Status
R
09
Q
Q
Q
Q
C
C
C
C
3
2
I
0
3
2
I
0
CHO DMA Address
R/W
01
A7 A6 AS
A4 A3
A2 Al
AO
AI5 AI4 AI3 AI2 All AIO A9 A8
CHO DMA Count
R/W
II
W7 W6 W5 W4 W3 W2 WI WO
WI5WI4WI3WI2WII WlOW9 W8
CH I DMA Address
R/W
03
A7 A6 AS
A4 A3
A2 Al
AD
AI5 AI4 AI3 AI2 All AIO A9
A8
CHI DMA Count
R/W
13
W7 W6 W5 W4 W3 W2 WI WO
WI5WI4WI3WI2WII WIOW9 W8
CH2 DMA Address
R/W
05
A7 A6 AS
A4 A3
A2 Al
AO
AI5 AI4 AI3 AI2 All AIO A9 A8
CH2 DMA Count
R/W
15
W7 W6 W5 W4 W3 W2 WI WO
WI5WI4WI3Wl2WII WIO\V9 W8
CH3 DMA Address
R/W
07
A7 A6 AS
A4 A3 A2 Al
AO
AI5 AI4 AI3 Al2 All AIO A9 A8
CH3 DMA Count
R/W
17
W7 W6 W5 W4 W3 W2 WI WO
WI5WI4 WI3WI2WII WlOW9 W8
2-15
Advertisement
Table of Contents
