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The BBM write protect command 110 port address is 59(HEX). A logical" 1" on the
Least Significant Bit (LSB) position on the data bus enables writing to the BBM; a
"0" sets the BBM for write protection.
2.6.3
Read Only Memory
The Processor PCB contains 8K of ROM in tw04K x 8-bit Erasable Programmable
Read-Only Memory (EPROM) chips. The ROM has two functions: flexible disk
self-testing and bootstrap loading. As shown in Figure 2-17, the ROM occupies the
8K addresses from FEOOO through FFFFF and is visible in eight duplicate 8K
sections from FOOOO through FFFFF. At APC power-on, the 8086 code segment
and instruction-pointer registers are set to FFFF(HEX) and OOOO(HEX) addresses
respectively for loading and auto self-test, instructions for which are resident in the
ROM.
2.7
PARALLEL PRINTER CONTROL
This portion of the logic provides an 110 TTL interface with an external parallel-
data-bus printer.
As shown in Figures 2-20 and 2-21, the parallel printer control consists of an NEC
pPD8255A Programmable Peripheral Controller that interfaces with connector
CN2 through LS244 drivers. A flat-type 26-conductor cable connects the CN2
board connector to a connector at the rear of the main unit that, in turn, goes to the
printer. The pin connections are listed in Table 2-6. The interface is adaptable to
either an Output Device Adapter (ODA) or Centronics-type printer by setting
appropriate jumpers on TM2, TM3, and TM4 on the Processor PCB (see Figure
2-29).
2.7.1
Interface
Table 2-7 lists the interface lines.
2.7.2
Programming Considerations
The 8255A device is operated in the APC as Mode 0 (basic 110) in the Group A
ports (Port A and upper 4 lines of Port C), and Mode 1 (strobed) in the Group B
ports (Port B and lower 4 lines of Port C). The eight lines of Port B (PBO through
PB7) carry the strobed data to the printer; 110 control line levels are from Ports A
and C.
Programming and execution of the 8255 is accomplished using the instructions
described in Tables 2-8 and 2-9. Figures 2-22 and 2-23 show interline timing under
various operating conditions.
Processor PCB
2-29
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