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The following items are the principal operating characteristics of the monochrome
CRT Display.
• Display control. A brightness control knob is available to the operator on
the front of the unit.
• Monochrome Display screen. The Monochrome CRT Display employs a
yellow-green, long-persistence phosphor (P39) and has a reduced-glare
surface. The display format is 80 characters wide by 25 lines high plus one
status line. Each standard character consists of a 7 (width)-by-ll (height)
dot matrix. Special characters can be as large as 8-by-16 dots. The screen is
composed of 475 lines of vertical resolution.
• Color Display screen. The Color Display has an 8-color, high-resolution,
reduced-glare screen.
• Horizontal drive. This positive level, TTL compatible frequency is 22.727
kHz. The minimum pulse width is 3 JiS.
• Vertical drive. This frequency is 41.5 Hz and is negative leveVTTL compatible.
• Video signal. The video signal is positive level with a 50-ns minimum pulse
width.
• CRT Display interface.
3.4
FLEXIBLE DISK DRIVE CONTROLLER
The APC has space and power for two 8-inch FDDs. The drives are soft-sectored
and two-sided, with 77 cylinders (0 to 76). They use Modified Frequency Modula-
tion (MFM) coded in 256 byte sectors (except index track), giving an unformatted
capacity of about 1.2 MB per drive. They have a track access time of 5 ms.
The 8-inch Flexible Disk Drive Controller (FDC) on the Controller PCB attaches
to the FDD with an internal flat cable, which is daisy-chained if there are two
FDDs.
The FDC is designed for double-density MFM-coded drives, uses write precompen-
sation, and employs the NEC JiPD765. The FDC uses DMA for record-data
transfers. An interrupt level indicates completed operation or a status condition
that requires processor attention.
Figure 3-11 is a functional block diagram of the FDe. This controller contains two
registers that can be accessed by the main processor: a status register and a data
register. The 8-bit main status register contains the status information of the FDC
and can be accessed at any time. This register facilitates the transfer of data between
the processor and FDC. It can be read only. Table 3-7 summarizes the bit functions
of the main status register.
Controller PCB
3-21
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