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Control Port Functions
Pin No.
Name
172
Vss-PLL1
173
Vss-PLL2
174
CAP2
175
Vcc-PLL2
176
PCC0WAIT/PTH[6]/AUDCK
177
Vss
178
Vcc
179
XTAL
180
EXTAL
181
LCD15/PTM[3]/PINT[10]
182
LCD14/PTM[2]/PINT[9]
183
LCD13/PTM[1]/PINT[8]
184
LCD12/PTM[0]
185
STATUS0/PTJ[6]
186
STATUS1/PTJ[7]
187
CL2/PTH[7]
188
VssQ
189
CKIO
190
VccQ
191
TxD0/SCPT[0]
192
SCK0/SCPT[1]
193
TxD_SIO/SCPT[2]
194
SIOMCLK/SCPT[3]
195
TxD2/SCPT[4]
196
SCK_SIO/SCPT[5]
197
SIOFSYNC/SCPT[6]
198
RxD0/SCPT[0]
199
RxD_SIO/SCPT[2]
200
Vss
201
RxD2/SCPT[4]
202
Vcc
203
SCPT[7]/CTS2/IRQ5
204
LCD11/PTC[7]/PINT[3]
205
LCD10/PTC[6]/PINT[2]
206
LCD9/PTC[5]/PINT[1]
207
VssQ
208
LCD8/PTC[4]/PINT[0]
209
VccQ
210
LCD7/PTD[3]
211
LCD6/PTD[2]
212
LCD5/PTC[3]
213
LCD4/PTC[2]
214
LCD3/PTC[1]
215
LCD2/PTC[0]
216
LCD1/PTD[1]
217
LCD0/PTD[0]
218
DREQ0/PTD[4]
219
LCK/UCLK/PTD[6]
220
RESETP
221
CA
222
MD3
223
MD4
224
Scan_testen
225
AVcc_USB
226
USB1_P(analog)
227
USB1_M(analog)
228
AVss_USB
229
USB2_P(analog)
230
USB2_M(analog)
231
AVcc_USB
232
AVss
233
AN[2]/PTL[2]
234
AN[3]/PTL[3]
235
AN[4]/PTL[4]
236
AN[5]/PTL[5]
237
AVcc
238
AN[6]/PTL[6]/DA[1]
239
AN[7]/PTL[7]/DA[0]
240
AVss
Function Name
Function
GND
Vss for PLL1 (0V)
GND
Vss for PLL2 (0V)
CAP2
Capacitor for PLL2[470pF]
1.9V
Vcc for PLL2 (1.9V)
AUDCK [ICE]
AUD Clock
GND
Vss (0V)
1.9V
Vcc (1.9V)
(Reserve)
X'tal
EXTAL
External Clock / X'tal [33.3333MHz]
-
PW_PG_SEL
PIXEL Write
CONFIG_DONE
FPGA1&2 Configuration Done
CONFIG_INIT
FPGA1&2 Configuration Status
SDA_ICS
IIC BUS DATA (ICS)
SCL_ICS
IIC BUS CLOCK (ICS)
15.5V_SW
GND
Vss for i/O (0V)
CKIO
System Clock I/O
3.3V
Vcc for I/O (3.3V)
TxD0
Tx Data_0 [PIXEL]
TxD2
Tx Data_2 [External]
RxD0
Rx Data_0 [PIXEL]
GND
Vss (0V)
RxD2
Rx Data_2 [External]
1.9V
Vcc (1.9V)
EXP_INTR
SCI Port / Tx Clear_2 / External Interrupt
SDA_SLOT4
IIC BUS DATA (Slot4)
SCL_SLOT4
IIC BUS CLOCK (Slot4)
SDA_SLOT3
IIC BUS DATA (Slot3)
GND
Vss for i/O (0V)
SCL_SLOT3
IIC BUS CLOCK (Slot3)
3.3V
Vcc for I/O (3.3V)
SYS SW
Peripheral ICs Power SW
POWER_SW1
Power SW for MAIN Board
SDA_SLOT2
IIC BUS DATA (Slot2)
SCL_SLOT2
IIC BUS CLOCK (Slot2)
SDA_SLOT1
IIC BUS DATA (Slot1)
SCL_SLOT1
IIC BUS CLOCK (Slot1)
SDA_INNER
IIC BUS DATA (Main)
SCL_INNER
IIC BUS CLOCK (Main)
---
DMA Request / Port_D
UCLK
USB Clock [48MHz]
RESETP
Power On Reset Request
MD3
Area_0 Bus Width Setting
MD4
Area_0 Bus Width Setting
3.3V
Test Pin (Set 3.3V)
3.3V
USB Analog Vcc (3.3V)
(USB1P) [Func]
USB1 Data I/O (+)
(USB1M) [Func]
USB1 Data I/O (-)
GND
USB Analog Vss (0V)
(USB2P) [Host]
USB2 Data I/O (+)
(USB2M) [Host]
USB2 Data I/O (-)
3.3V
USB Analog Vcc (3.3V)
GND
USB Analog Vss (0V)
TEMP SENSOR
AD Converter Input
AC SENSOR
AD Converter Input
KEY1
KEY AD Converter Input
KEY2
KEY AD Converter Input
3.3V
Analog Vcc (3.3V)
KEY3
KEY AD Converter Input
OPT1
Option resistor AD Converter Input
GND
Analog Vss (0V)
-100-
Polarity
I/O
-
-
-
-
-
-
-
-
-
I
-
-
-
-
(Open)
-
-
I
(Open)
-
(H: SH, L: PW)
I
-
I
-
I
-
IO
-
IO
-
-
-
I/O
-
-
-
O
(Open)
-
(Open)
-
(Pull-up)
-
-
O
(Pull-up)
-
(Pull-up)
-
-
I
(Pull-up)
-
-
-
-
I
-
-
O
-
IO
-
IO
-
IO
-
-
-
IO
-
-
(H= Off / L= On)
O
(L= Off / H= On)
O
-
IO
-
IO
-
IO
-
IO
-
IO
-
IO
(Pull-up)
-
-
I
-
I
(Pull-up)
-
H
I
H
I
-
I
-
-
I/O
I/O
-
-
I/O
I/O
-
-
-
-
-
I
-
I
-
I
-
I
-
-
-
I
-
I
-
-
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