Product Description - Silicon Graphics Virtu VN200 Hardware User's Manual

SGI Virtu VN200 Overview

Product Description

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This document is intended as an overview of some of the common operations that
system administrators may have to perform to set-up, boot, re-configure (upgrade) or
troubleshoot an SGI Altix XE cluster with SGI Virtu VN200 graphics nodes.
The initial release of the SGI Virtu VN200 system (refer to
SGI Altix XE320 servers (compute nodes), one or more SGI Altix XE250 servers (head
nodes), and one more SGI Virtu VN200 graphics nodes (visualization/compute nodes).
The nodes are networked together using InfiniBand or Gigabit Ethernet switches and can
run parallel programs using a message passing tool like the Message Passing Interface
(MPI).
An SGI Virtu VN200 system is a distributed memory server as opposed to a shared
memory system like that used in the SGI Altix 450 or SGI Altix 4700 high-performance
compute servers. Instead of passing pointers into a shared virtual address space, parallel
processes in an application pass messages, with each process requiring its own dedicated
processor and address space.
Just like a multi-processor shared memory system, a cluster can be shared among
multiple applications. For instance, one application may run on 16 processors in the
cluster while another application runs on a different set of 8 processors. Very large
clusters may run dozens of separate, independent applications at the same time.
Typically, each process of an MPI job runs exclusively on a processor. Multiple processes
can share a single processor, through standard Linux context switching, but this can have
a significant effect on application performance. A parallel program can only finish when
all of its sub-processes have finished. If one process is delayed because it is sharing a
processor and memory with another application, then the entire parallel program is
delayed. This gets slightly more complicated when systems have multiple processors
(and/or multiple cores) that share memory, but the basic rule is that a process is run on
a dedicated processor core.
Figure 1-1) is one or more
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