Arbor Technology ITX-i45M2 User Manual
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Arbor Technology ITX-i45M2 User Manual

Mini itx industrial motherboard
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ITX-i45M2
Mini ITX Industrial Motherboard
User's Manual
Version 1.1
2009.11

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Summary of Contents for Arbor Technology ITX-i45M2

  • Page 1 ITX-i45M2 Mini ITX Industrial Motherboard User’s Manual Version 1.1 2009.11...
  • Page 2 This page is intentionally left blank.

  • Page 3: Table Of Contents

    Index Table of Contents Chapter 1 - Introduction ..........1 1.1 Copyright Notice ............2 1.2 About this User’s Manual .........2 1.3 Warning ..............2 1.4 Replacing the Lithium Battery .........3 1.5 Technical Support .............3 1.6 Warranty ..............4 1.7 Packing List ...............5 1.8 Ordering Information ..........5 1.9 Specifications ............6 1.10 Board Dimensions ..........7...
  • Page 4 Index INV1: LCD Inverter Connector ........23 LVDS1: LVDS LCD Connector ........24 LPT1: Parallel Port Connector ........25 IR1: Infrared Connector ..........25 AUDIO1: HD Audio Connector ........26 COM1, COM2: Serial Port Connectors ......26 LAN1, LAN2: RJ-45 + USB connectors ......26 VGA1: Analog RGB & DVI-D Connectors .....27 EKB1: External Keyboard &...
  • Page 5 Index 3.9 AMI BIOS Checkpoints ...........59 3.9.1 Bootblock Initialization Code Checkpoints ..................59 3.9.2 Bootblock Recovery Code Checkpoints ...61 3.9.3 POST Code Checkpoints ......63 3.9.4 DIM Code Checkpoints .......67 3.9.5 ACPI Runtime Checkpoints ......69 Chapter 4 - Appendix ..........71 4.1 I/O Port Address Map ..........72 4.2 Interrupt Request Lines (IRQ) ........73 4.3 BIOS memory mapping ..........74...
  • Page 6 Index This page is intentionally left blank. - iv -...

  • Page 7: Chapter 1 Introduction

    Introduction Chapter 1 Introduction Chapter 1 - Introduction - 1 - - 1 -...

  • Page 8: Copyright Notice

    Introduction 1.1 Copyright Notice All Rights Reserved. The information in this document is subject to change without prior notice in order to improve the reliability, design and function. It does not represent a commitment on the part of the manufacturer. Under no circumstances will the manufacturer be liable for any direct, indirect, special, incidental, or consequential damages arising from the use or inability to use the product or documentation, even if advised of the possibility of such...

  • Page 9: Replacing The Lithium Battery

    Introduction 1.4 Replacing the Lithium Battery Incorrect replacement of the lithium battery may lead to a risk of explosion. The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Do not throw lithium batteries into the trash can. It must be disposed of in accordance with local regulations concerning special waste.

  • Page 10: Warranty

    Introduction 1.6 Warranty This product is warranted to be in good working order for a period of two years from the date of purchase. Should this product fail to be in good working order at any time during this period, we will, at our option, replace or repair it at no additional charge except as set forth in the following terms.

  • Page 11: Packing List

    Introduction 1.7 Packing List mPGA478B 1 x ITX-i4M2 Industrial Motherboard 1 x Driver CD 1 x Quick Installation Guide 1 x CPU Cooler 1 x I/O bracket If any of the above items is damaged or missing, contact your vendor immediately.

  • Page 12: Specifications

    Introduction 1.9 Specifications Form Factor Mini-ITX industrial motherboard Socket-P Intel® Penryn Core™ 2 Duo with 667/800/1066MHz FSB, Celeron® M with 800MHz FSB Processor Chipset Intel® GM4 + Intel® ICH9M 2 x 240-pin DIMM Sockets up to 4GB DDR2 SDRAM with System Memory 667/800MHz Integrated Intel®...

  • Page 13: Board Dimensions

    Introduction 1.10 Board Dimensions CPU Cooler mPGA478B 31.10 6.33 157.48 169.98 LAN2 LAN1 Line Out COM1 COM2 43.98 74.85 22.07 123.78 24.23 Unit: mm 162.16 - 7 - - 7 -...

  • Page 14: Installing The Cpu

    Introduction 1.11 Installing the CPU The processor socket comes with a screw to secure the CPU. As showing in the picture as bellow, loose the screw first before inserting the CPU. Place the CPU into the socket by making sure the notch on the corner of the CPU corresponding with the notch on the inside of the socket.

  • Page 15: Installing The Memory

    Introduction 1.12 Installing the Memory To install the Memory module, locate the Memory DIMM slot on the board and perform as below: 1. Hold the Memory module so that the key of the Memory module align with those on the Memory DIMM slot. 2.
  • Page 16 Introduction This page is intentionally left blank. - 10 - - 10 -...

  • Page 17: Chapter 2 Installation

    Installation Chapter 2 Installation Chapter 2 - Installation - 11 - - 11 -...

  • Page 18: Block Diagram

    Installation 2.1 Block Diagram Socket-P for Intel® Penryn 667/800/1066MHz Analog R.G.B. Memory Bus 2 x 240-pin DDR2 DIMM socket 667/800MHz Intel® GM45 LVDS TV-out 1 x Mini-PCI Socket DMI I/F USB I/F PCI Bus 1 x PCI Slot 8 x USB Intel®...

  • Page 19: Jumpers And Connectors

    Installation 2.2 Jumpers and Connectors CPUF1 SATA3, SATA4 DIO1 SATA1, SATA2 USB2 Socket-P USB1 JBAT1 DIMM2, DIMM1 SYSF1 PCI1 JPWR1 MINIPCI1 JFRT1 JRS1 CON1 INV1 LVDS1 JVLCD1 LPT1 EKB1 COM2 VGA1 LAN2 LAN1 COM1 AUDIO1 - 13 - - 13 -...

  • Page 20: Jumpers

    Installation Jumpers JBAT1: Clear CMOS Setting (9) If the board refuses to boot due to inappropriate CMOS settings, here is how to proceed to clear (reset) the CMOS to its default values. Connector type: 2.4 mm pitch 1x3-pin headers Mode Keep CMOS (Default) Clear CMOS You may need to clear the CMOS if your system cannot boot up because you...

  • Page 21: Jrs1: Com2 Rs-232/422/485 Selection

    Installation JRS1: COM2 RS-232/422/485 Selection (15) The onboard COM2 port can be configured to operate in RS-422 or RS-485 modes. RS-422 modes differ in the way RX/TX is being handled. Jumper JRS1 switches between RS-232 or RS-422/48 mode. When JRS1 is set to RS-422 or RS-48 mode, there will be only +12V output let while JRS1 is set.

  • Page 22: Jv1: Com Port Power Special Support

    Installation JV1: COM port Power Special Support (24) The COM1 port’s voltage could be selected by LV1 respectively to +V. Connector type: 2.4mm pitch 1x3-pin headers. Setup Standard signal for Pin-9. (Default) JPWR1: AT/ATX Power Mode (30) The power mode jumper selects the power mode for the system. Connector type: 2.4mm pitch 1x2-pin headers.

  • Page 23: Connectors

    Installation Connectors CPUF1: CPU Fan Connector (1) CPUF1 is 3-pin headers for the system fan. The fan must be a +12V fan. Description +12V FAN_Detect SATA1~ 4: Serial ATA Connectors (2, 3, 5, 6) The ITX-i4M2 on board supports four SATA connectors, second generation SATA drives transfer data at speeds as high as 300MB/s, twice the transfer speed of first generation SATA drives.

  • Page 24: Usb1/ Usb2: Usb Connectors

    Installation USB1, USB2: USB Connectors (7, 8) The ITX-i4M2 CPU board on board supports three headers USB1 and USB2 that can connect up to six high-speed (Data transfers at 480Mb/s), full-speed (Data transfers at 12Mb/s) or low-speed (Data transfers at 1.Mb/s) USB devices.

  • Page 25: Pci1: 32-Bit Pci Slot

    Installation PCI1: 32-bit PCI Slot (11) Description Description -12V TRST +12V INTA# INTB# INTC# INTD# PRSTN1 RSVD RSVD PRSTN2 RSVD RSVD 3.3V_AUX RST# GNT# REQ# PME# AD31 AD30 AD29 +3.3V AD28 AD27 AD26 AD2 +3.3V AD24 C/BE3# IDSEL AD23 +3.3V AD22 AD21 AD20...
  • Page 26 Installation IRDY# +3.3V TRDY# DEVSEL# STOP# LOCK# +3.3V PERR# SDONE +3.3V SBO# SERR# +3.3V C/BE1# AD1 AD14 +3.3V AD13 AD12 AD11 AD10 C/BE0# +3.3V +3.3V ACK64# REQ64# - 20 - - 20 -...

  • Page 27: Minipci1: Minicpi Socket

    Installation MINIPCI1: MiniPCI socket (12) TV1: TV-out Connector (13) The TV out connector is for output to a television. Connector type: 2.00mm pitch 1x6-pin box wafer connector Composite Video CVBS Unused Unused S-Video Unused Luminance Chrominance - 21 - - 21 -...
  • Page 28 Installation JFRT1: Switches and Indicators (14) It provides connectors for system indicators that provides light indication of the computer activities and switches to change the computer status. Connector type: 2.4 mm pitch 2x8-pin headers Description Description Power LED+ PWRBTN- PWRBTN+ RESET+ HDD LED+ RESET-...

  • Page 29: Con1: Rs-422/ 485 Connector

    Installation CON1: RS-422/ 485 Connector (16) Connector type: 2.00mm pitch 1x4-pin box wafer connector RS-422 RS-48 Data+ Data- INV1: LCD Inverter Connector (17) Connector type: 2.00mm pitch 1x-pin box wafer connector. Description +12V Backlight on/off - 23 - - 23 -...

  • Page 30: Lvds1: Lvds Lcd Connector

    Installation LVDS1: LVDS LCD Connector (18) The LVDS connector supports 24-bit LVDS. VDD could be selected by JVLCD1 in +V or +3.3V. Connector type: DF-13-30DP-1.2V Description Description TX2CLK+ TX1CLK+ TX2CLK- TX1CLK- TX2D0+ TX1D0+ TX2D0- TX1D0- TX2D1+ TX1D1+ TX2D1- TX1D1- TX2D2+ TX1D2+ TX2D2- TX1D2-...

  • Page 31: Lpt1: Parallel Port Connector

    Installation LPT1: Parallel Port Connector (20) Connector type: 2.00 pitch 2x13-pin headers. Shared with Floppy, LPT1 can be configured as a connector floppy disk drive interface through BIOS setup. Description Description STROBE PTD0 ERROR PTD1 INIT PTD2 SLIN PTD3 PTD4 PTD PTD6 PTD7...

  • Page 32: Audio1: Hd Audio Connector

    Installation AUDIO1: HD AUDIO connector (22) Connector type: double stacked audio jacks (Stereo ø3.0). Green: Line Out Pink: Mic COM1, COM2: Serial Port Connectors (23) Connector type: Double stacked D-Sub 9-pin male. Description Description DSR# DCD# RTS# CTS# DTR# LAN1, LAN2: RJ-45 + double stacked USB connectors (25, LAN1 and LAN2 support one Ethernet and two USB 2.0 connectors with 480Mb/s.

  • Page 33: Vga1: Analog Rgb & Dvi-D Connectors

    Installation VGA1: Analog RGB & DVI-D Connectors (27) Connector type: VGA: D-Sub 1-pin female. DVI-D: DVI-D female. Analog RGB DVI-D Analog RGB Connector Description Description Description GREEN VDDAT BLUE HSYNC VSYNC VDCLK DVI-D Connector Description Description Description TMDS Data 2- TMDS Data 1- TMDS Data 0- TMDS Data 2+...

  • Page 34: Ekb1: External Keyboard & Mouse Connector

    Installation EKB1: External Keyboard & Mouse Connector (28) Connector type: 2.4mm pitch 1x6-pin box wafer connector Description KB Data MS Data KB Clock MS Clock - 28 - - 28 -...

  • Page 35: Pw1: Atx Power Connector

    Installation PW1: ATX Power Supply Connector (29) The ATX power supply has a single lead connector with a clip on one side of the plastic housing. There is only one way to plug the lead into the ATX power connector. Press the lead connector down until the clip snaps into place and secures the lead onto the connector.

  • Page 36: The Installation Paths Of Cd Driver

    Installation 2.3 The Installation Paths of CD Driver Windows 2000 & XP Driver Path AUDIO \AUDIO\REALTEK_HD\WINDOWS_R198 CHIPSET \CHIPSET\INTEL\INF 9 \ETHERNET\REALTEK\8111B_WIN698 \GRAPHICS\INTEL_2K_XP_32\1436 \GRAPHICS\INTEL_2K_XP_64\1436 Windows Vista Driver Path AUDIO \AUDIO\REALTEK_HD\Vista_R198 CHIPSET \CHIPSET\INTEL\INF 9 \ETHERNET\REALTEK\Vista_6206_0619 \GRAPHICS\INTEL_VISTA_32\198 \GRAPHICS\INTEL_VISTA_64\198 - 30 - - 30 -...

  • Page 37: Chapter 3 - Bios

    BIOS Chapter 3 BIOS Chapter 3 - BIOS - 31 - - 31 -...

  • Page 38: Bios Main Setup

    BIOS 3.1 BIOS Main Setup The AMI BIOS provides a Setup utility program for specifying the system configurations and settings. The BIOS ROM of the system stores the Setup utility. When you turn on the computer, the AMI BIOS is immediately activated. The Main allows you to select several configuration options.

  • Page 39: Advanced Settings

    BIOS System Date Set the system date. Note that the ‘Day’ automatically changes when you set the date. Day : Sun to Sat The date format is: Month : 1 to 12 Date : 1 to 31 Year : 1999 to 2099 3.2 Advanced Settings - 33 - - 33 -...

  • Page 40: Cpu Configuration

    BIOS 3.2.1 CPU Configuration The CPU Configuration setup screen varies depending on the installed processor. Execute Disable Bit When disabled, force the SD feature flag to always return 0. - 34 - - 34 -...

  • Page 41: Ide Configuration

    BIOS 3.2.2 IDE Configuration SATA#1 Configuration Enable - Enable SATA configuration. Disabled - Disable SATA configuration Configure SATA#1 as This BIOS feature controls the SATA controller’s operating mode. There are two available modes - IDE and RAID. When set to: RAID - the SATA controller enables its RAID and AHCI functions when the computer boots up.

  • Page 42: Floppy Configuration

    BIOS 3.2.3 Floppy Configuration Select the type of floppy disk drive installed in your system. The choice: None 360K .2” 1.2M .2” 720K 3.” 1.44M 3.” 2.88M 3.” Floppy 3: The choice are Disabled or Enabled. - 36 - - 36 -...

  • Page 43: Super Io Configuration

    BIOS 3.2.4 Super IO Configuration Serial Port1 / Port2 Address Select an address and corresponding interrupt for the first and second serial ports. The choice: 3F8/IRQ4 2E8/IRQ3 3E8/IRQ4 2F8/IRQ3 Disabled Auto Serial Port2 Mode Allows BIOS to select mode for serial Port2. - 37 - - 37 -...

  • Page 44: Parallel Port Address

    BIOS Parallel Port Address Select an address for the parallel port. The choice: Disabled Parallel Port Mode Select an operating mode for the onboard parallel port. Select Normal, Compatible or SPP unless you are certain your hardware and software both support one of the other available modes.

  • Page 45: Hardware Health Configuration

    BIOS 3.2.5 Hardware Health Configuration System/ CPU Temperature Show you the current System / CPU fan temperature. CPU Fan Speed Show you the current CPU Fan operating speed. Vcore Show you the voltage level of CPU (Vcore). +1.5V / +3.3Vin / +5Vin / +12Vin / 5VSB Show you the voltage level of the +1.V, +3.3Vin, +Vin, +12Vin and +V standby.

  • Page 46: Ahci Configuration

    BIOS 3.2.6 AHCI Configuration AHCI Port 0 / Port 1 / Port 2/ Port 3 While entering setup, BIOS auto detects the presence of IDE devices. This displays the status of auto detection of IDE devices. - 40 - - 40 -...

  • Page 47: Usb Configuration

    BIOS 3.2.7 USB Configuration ACPI Function It supports ACPI (Advance Configuration and Power Interface). Setting: Enabled (Default), Disabled. Legacy USB Support Enables support for legacy USB. AUTO option disables legacy support if no USB devices are connected. USB 2.0 Controller Mode Configures the USB 2.0 controller in High Speed (480Mbps) or Full Speed (12MBPS).

  • Page 48: Advanced Pci/Pnp Settings

    BIOS 3.3 Advanced PCI/PnP Settings Plug & Play O/S No: Lets the BIOS configure all the devices in the system. Yes: lets the operating system configure Plug and Play (PnP) devices not required for BOOT if your system has a Plug and Play operating system.

  • Page 49: Boot Settings

    BIOS 3.4 Boot Settings Boot Device Priority Press Enter and it shows Bootable add-in devices. Removable Drives Press Enter and it shows Bootable and Removable drives. - 43 - - 43 -...

  • Page 50: Boot Settings Configuration

    BIOS 3.4.1 Boot Settings Configuration Bootup Num-Lock Set this value to allow the Number Lock setting to be modified during boot PS/2 Mouse Support Interrupt 19 capture Enabled: Allows option ROMs to trap interrupt 19. This is required by some PCI cards that provide a ROM based setup utility.

  • Page 51: Boot Device Priority

    BIOS 3.4.2 Boot device Priority 1st/ 2nd/ 3rd Boot Device Specifies the boot sequence form the available devices. A device enclosed in parenthesis has been disabled in the corresponding type menu. - 4 - - 4 -...

  • Page 52: Security

    BIOS 3.5 Security Auto Detect PCI Clk It enables or disables the auto detection of the PCI clock. Setting: Enabled (Default), Disabled. Supervisor Password & User Password You can set either supervisor or user password, or both of them. The differences between are: Set Supervisor Password: Can enter and change the options of the setup menus.
  • Page 53 BIOS Type the password, up to eight characters in length, and press <Enter>. The password typed now will clear any previously entered password from CMOS memory. You will be asked to confirm the password. Type the password again and press <Enter>. You may also press <ESC> to abort the selection and not enter a password.

  • Page 54: Advanced Chipset Settings

    BIOS 3.6 Advanced Chipset Settings 3.6.1 North Bridge Chipset Configuration Boots Graphic Adapter Priority Select which graphics controller to use as the primary boot device. Internal Graphic Mode Select Select the amount of system memory used by the Internal graphics device. PEG Port Configuration This item allows you to control the PEG or on-chip VGA.

  • Page 55: Video Function Configuration

    BIOS Video Function Configuration DVMT Mode The choice: FIXED, DVMT (Default), Both. Boot Display Device Setting: CRT, LVDS, CRT+ LVDS (Default). Flat Panel Type It allows you to select the Flat Panel type as below --- Setting: 640x480 800x600 1024x768 (Default) 1280x1024 1400x100...

  • Page 56: South Bridge Chipset Configuration

    BIOS 3.6.2 South Bridge Chipset Configuration USB Funtion This item allows you to active USB ports. The Choice: Disabled 2 USB Ports 4 USB Ports 6 USB Ports 8 USB Ports - 0 - - 0 -...
  • Page 57 BIOS USB 2.0 Controller Select “Enabled” if your system contains a Universal Serial Bus 2.0 (USB 2.0) controller and you have USB peripherals. The Choice: Enabled, Disabled. HDA Controller This item allows you to select the chipset family to support High Definition Audio Controller.

  • Page 58: Exit Options

    BIOS 3.7 Exit Options Save Changes and Exit Pressing <Enter> on this item asks for confirmation: Save configuration changes and exit setup? Pressing <OK> stores the selection made in the menus in CMOS - a special section of memory that stays on after you turn your system off. The next time you boot your computer, the BIOS configures your system according to the Setup selections stored in CMOS.

  • Page 59: Discard Changes And Exit

    BIOS Discard Changes and Exit Exit system setup without saving any changes. <ESC> key can be used for this operation. - 3 - - 3 -...

  • Page 60: Discard Changes

    BIOS Discard Changes Discards changes done so far to any of the setup questions. <F7> can be used for this operation. - 4 - - 4 -...

  • Page 61: Load Optimal Defaults

    BIOS Load Optimal Defaults When you press <Enter> on this item, you get a confirmation dialog box with a message: Load Optimal Defaults? [OK] [Cancel] Pressing [OK] loads the BIOS Optimal Default values for all the setup questions. <F9> key can be used for this operation. -  - -  -...

  • Page 62: Load Failsafe Defaults

    BIOS Load Failsafe Defaults When you press <Enter> on this item you get a confirmation dialog box with a message: Load Failsafe Defaults? [OK] [Cancel] Pressing [OK] loads the BIOS Failsafe Default values for all the setup questions. <F8> key can be used for this operation. - 6 - - 6 -...

  • Page 63: Beep Sound Codes List

    BIOS 3.8 Beep Sound codes list 3.8.1 Boot Block Beep codes Number of Beeps Description Insert diskette in floppy drive A: ‘AMIBOOT.ROM’ file not found in root directory of diskette in A: Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error...

  • Page 64: Troubleshooting Post Bios Beep Codes

    BIOS 3.8.3 Troubleshooting POST BIOS Beep codes Number of Beeps Description Reseat the memory, or replace with known good 1, 2 or 3 modules. Fatal error indicating a serious problem with the system. Consult your system manufacturer. Before declaring the motherboard beyond all hope, eliminate the possibility of interference by a malfunctioning add-in card.

  • Page 65: Ami Bios Checkpoints

    BIOS 3.9 AMI BIOS Checkpoints 3.9.1 Bootblock Initialization Code Checkpoints The Bootblock initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS (Note) Checkpoint...
  • Page 66 BIOS Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. If BIOS recovery is necessary, control flows tocheckpoint E0. Seed Bootblock Recovery Code Checkpoints section of document for more information. Restore CPUID value back into register. The Bootblock- Runtime interface module is moved to system memory and control is given to it.

  • Page 67: Bootblock Recovery Code Checkpoints

    BIOS 3.9.2 Bootblock Recovery Code Checkpoints The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt. The following table describes the type of checkpoints that may occur during the Bootblock recovery portion of the BIOS (Note)
  • Page 68 BIOS Erase the flash part. Program the flash part. The flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h. - 62 - - 62 -...

  • Page 69: Post Code Checkpoints

    BIOS 3.9.3 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS pre-boot process. The following table describes the type of checkpoints that may occur during the POST portion of the BIOS (Note) Checkpoint Description Disable NMI, Parity, video for EGA, and DMA controllers.
  • Page 70 BIOS Early CPU Init Exit Initializes the 8042 compatible Key Board Controller. Detects the presence of PS/2 mouse. Detects the presence of Keyboard in KBC port. Testing and initialization of different Input Devices. Also, update the Kernel Variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1.
  • Page 71 BIOS Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. USB controllers are initialized at this point. Initializes DMAC-1 & DMAC-2. Initialize RTC date/time. Test for total memory installed in the system. Also, Check for keys to limit memory test.
  • Page 72 BIOS Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display if needed. Initialize runtime language module. Display boot option popup menu.

  • Page 73: Dim Code Checkpoints

    BIOS 3.9.4 DIM Code Checkpoints The Device Initialization Manager (DIM) gets control at various times during BIOS POST to initialize different system buses. The following table describes the main checkpoints where the DIM module is accessed (Note) Checkpoint Description Initialize different buses and perform the following functions: Reset, Detect, and Disable (function 0);...
  • Page 74 BIOS While control is in the different functions, additional checkpoints are output to port 80h as a word value to identify the routines under execution. The low byte value indicates the main POST Code Checkpoint. The high byte is divided into two nibbles and contains two fields. The details of the high byte of these checkpoints are as follows: HIGH BYTE XY The upper nibble “X”...

  • Page 75: Acpi Runtime Checkpoints

    BIOS 3.9.5 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state. The following table describes the type of checkpoints that may occur during ACPI sleep or wake events (Note) Checkpoint Description First ASL check point.
  • Page 76 BIOS This page is intentionally left blank. - 70 - - 70 -...

  • Page 77: Chapter 4 - Appendix

    Appendix Chapter 4 Appendix Chapter 4 - Appendix - 71 - - 71 -...

  • Page 78: I/O Port Address Map

    Appendix 4.1 I/O Port Address Map Each peripheral device in the system is assigned a set of I/O port addresses which also becomes the identity of the device. The following table lists the I/O port addresses used. Address Device Description 00000000 - 0000000F DMA Controller 00000080 - 0000009F...

  • Page 79: Interrupt Request Lines (Irq)

    Appendix 00000800 - 0000087F ACPI 00000A00 - 00000A07 00000A10 - 00000A17 Hardware Monitor 00000A20 - 00000A27 Digital I/O 00000A30 - 00000A37 SFIF 00000CF8 PCI Configuration Address 00000CFC PCI Configuration Data 00004700 - 0000470B TPM (If use) 4.2 Interrupt Request Lines (IRQ) Peripheral devices use interrupt request lines to notify CPU for the service required.

  • Page 80: Bios Memory Mapping

    Appendix 4.3 BIOS memory mapping Address Device Description 00000h - 9FFFFh DOS Kernel Area A0000h, BFFFFh EGA and VGA Video Buffer (128KB) C00000h - CFFFFh EGA/VGA ROM D0000h - DFFFFh Adaptor ROM E00000h - FFFFFh System BIOS EFD40000h - FED44FFFFh TPM (If use) 4.4 Watchdog Timer (WDT) Setting WDT is widely used for industry application to monitoring the activity...
  • Page 81 Appendix AX, 2Eh DX, AX AL, 07h DX, AL ; Point to Logical Device Selector AL, 08h DX, AL ; Select Logical Device 8 AX, 2Eh DX, AX AL, 30h DX, AL ; select CR30 AL, 01h DX, AL ; update CR30 to 01h AX, 2Eh DX, AX AL, 0F0h...
  • Page 82 Appendix C language Code /*----- Include Header Area -----*/ #include "math.h" #include "stdio.h" #include "dos.h" /*----- routing, sub-routing -----*/ void main() outportb(0x2e, 0x87); /* initial IO port twice */ outportb(0x2e, 0x87); outportb(0x2e, 0x2B); /* select CR2B */ outportb(0x2e+1, 0x00); /* update CR2B bit4 to 00h */ /* Set PIN89 as WDTO */ outportb(0x2e, 0x07);...

  • Page 83: Digital I/O Setting

    Appendix 4.5 Digital I/O Setting Below are the source codes written in assembly & C, please take them for Digital I/O application examples. The default I/O address is 6Eh. Assembly Code ax,402h dx,ax al,00h dx,al ; clear i2c bus ax,400h dx,ax al,0ffh dx,ax...
  • Page 84 Appendix ax,400h dx,ax al,0ffh dx,ax ; clear i2c bus status ax,404h dx,ax al,06eh dx,ax ; Set I2C Device Address=6eh ax,403h dx,ax al,020h dx,ax ;select GPIO 2 (index=20h) ax,40h dx,ax al,0ffh dx,ax ;Set all GPIO 2 pin as output ax,402h dx,ax al,048h dx,ax ;start write, active...
  • Page 85 Appendix ax,40h dx,ax al,0ffh dx,ax ;Set all GPIO 1 data = high ax,402h dx,ax al,048h dx,ax ;start write, active ;------------------------------------------------------------- ax,402h dx,ax al,00h dx,al ; clear i2c bus ax,400h dx,ax al,0ffh dx,ax ; clear i2c bus status ax,404h dx,ax al,06eh dx,ax ;...
  • Page 86 Appendix C Language Code /*----- Include Header Area -----*/ #include "math.h" #include "stdio.h" #include "dos.h" /*----- routing, sub-routing -----*/ void main(int argc, char *argv[]) int SMB_PORT_AD = 0x400; int SMB_DEVICE_ADD = 0x6e; /*7111R's Add=6eh */ int i,j; Index x0, GPIO1x Output pin control, Set all pin as output SMB_Byte_WRITE(SMB_PORT_AD,SMB_DEVICE_ADD,0x10,0xff);...
  • Page 87 Appendix SMB_Byte_WRITE(int SMPORT, int DeviceID, int REG_INDEX, int REG_DATA) outportb(SMPORT+02, 0x00); /* clear */ outportb(SMPORT+00, 0xff); /* clear */ delay(10); outportb(SMPORT+04, DeviceID); /* I2C Device Address */ outportb(SMPORT+03, REG_INDEX); /* Register Address in device */ outportb(SMPORT+0, REG_DATA); /* Data Value */ outportb(SMPORT+02, 0x48);...
  • Page 88 Appendix This page is intentionally left blank. - 82 - - 82 -...

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