Information Format - Xerox 560 Reference Manual

MASTER MODE
The master/slave control bit (bit 8 of the PSWs) must con-
tain a zero for the basic processor to operate in master
mode. In th is mode the basic processor can perform a II of
its control functions and can modify any part of the system.
The restrictions upon the basic processor1s operations in this
mode are those imposed by the write locks on certain pro-
tected parts of memory.
It is assumed that there is a res-
ident operating system (operating in the master mode) that
controls and supports the operation of other programs (which
may be in the master, master-protected, or slave mode).
MASTER-PROTECTED MODE
The master-protected mode of operation provides additional
protection for programs that operate in the master mode. The
master-protected mode occurs when the basic processor is
operating in the master mode with the memory map in effect
and the mode altered control bit (bit 61 of the PSWs) is on.
In this mode the memory protection violation trap occurs
(location X
I
40
I
,
with CC4
=
1), as it does in all mapped
slave programs, if a program makes a reference to a virtual
page to which access is prohibited by the current setting of
the access protecti on codes.
SLAVE MODE
The slave mode of operation is the problem-solving mode
of the basic processor. In this mode, access protection
codes apply to the slave mode program
if
mapping is in ef-
fect, and all IIprivileged II operations are prohibited. Priv-
ileged operations are those relating to input/output and to
changes in the fundamental control state of the basic pro-
cessor. All privileged operations are performed in the
master or master-protected mode by a group of privileged
instructions. Any attempt by a program to execute a priv-
ileged instruction whi Ie the basic processor is in the slave
mode results in a trap. The master/slave mode control bit
(bit 8 of the PSWs) can be changed when the basic processor
is in the master or master-protected mode. Nevertheless,
a s!aVe mode program can gain direct access to certai!1 ex-
ecutive program operations by means of CALL instructions.
-The operations avai lable through CALL instructions are es-
tablished by the resident operating system.
MAPPED MODE
Although the memory map is located in the Memory Inter-
face (MI), it functions as part of the basic processor. The
basic processor communicates with memory through the MI.
Mapping is effective for all the words of real memory, and
is invoked when bit 9 (MM) of the PSWs contains a one.
Memory mapping generates real page addresse:s from vir-tual
addresses. The memory map can be loaded with either
11-bit real page addresses or 8-bit real page addresses by
meansofthe MOVE MEMORY CONTROL (MMC) privileged
instruction (see Chapter 3, "Control Instructions "). Eleven-
bit real page addresses are always provided for in the map,
thus if 8-bit real page addresses are generated, the three
12 Basic Processor
high-order bits contain zeros. The memory map always maps
17-bit virtual addresses into 20-bit real addresses (see
IIMemory Address Control II, later in this chapter for a dis-
cussion of how the map is used).
UNMAPPED MODE
When the basic processor is operating in the unmapped mode,
there is a direct one-to-one relationship between the effec-
tive virtual address of each instruction and the actual ad-
dress used to access main memory. (See
II
Rea I Addressing
ll
,
later in this chapter.)
INFORMATION FORMAT
Nomenclature associated with digital information within the
computer system is based on functional and/or physical at-
tributes. A "word" may be either a 32-bit instruction word
or a 32-bit data word.
The bit positions of a word are numbered from 0 through 31
as follows:
A word can be divided into two 16-bit parts (halfwords) in
wh ich the bit positions are numbered from 0 through 15 as
follows:
A word can also be divided into four 8-bit parts (bytes) in
which the bit positions are numbered 0 through 7 as follows:
Two words can be combined to form a 64-bit element (a
doubleword) in which the bit positions are numbered 0
through 63 as follows:
I :
Least
Signif~cant
word:
I
n " "
"I~ ~
'" '"
~
" " ,,1« " "
,,:« " ' "
"I" ,; ,. ,,'
~
" " "1M,, " "
In fixed-point binary arithmetic each element of information
represents nurneiical data as a signed integer (bit 0 repre-
sents the sign, remaining bits represent the magnitude, and
the binary point is assumed to be just to the right of the
least significant or righi-most bit). Negative va lues are
represented in two1s complement form. Other formats re-
quired for floating-point and decimal instructions are de-
scribed in Chapter 3.