Addressing Logic - Xerox 560 Reference Manual

18 Main Memory
yes
Add 16-19 bit index to
17-bit reference address;
17-19 bit arithmetic.
Fetch contents of 20-bit
real address. If write
operation, trap on write-
protect violation.
Figure 5. Addressing Logic
Fetch contents of register.
Add 20-22 bit index to
17-bit direct reference
address or 20-bit indirect
reference address; 20-22
bit arithmetic.
Map to 20-bit real ad-
dress. Trap on access
protect violation if in
slave or master-protected
modes.