Xerox 560 Reference Manual page 96

the destination byte string begins with the byte location
pointed to by the destination address in register 1 and
is C bytes in length. In this case, the source byte is com-
pared with each byte of the destination byte string unti I an
inequality is found.
TBS
TRANSLATE BYTE STRING
(Immediate displacement, continue after interrupt)
TRANSLATE BYTE STRING replaces each byte of the desti-
nation byte string with a source byte located in a translation
table. The destination byte string begins with the byte lo-
cation pointed to by the destination address in regi ster Ru 1,
and is C bytes in length. The translation table consists of
up to 256 consecutive byte locations, with the first byte
location of the table pointed to by the displacement in TBS
plus the source address in register R. A source byte is de-
fined as that which is in the byte location pointed to by the
19 low-order bits of the sum of the following values.
1.
The displacement in bit positions 12-31 of the TBS
instruction.
2. The current contents of bit positions 13-31 of register R
{source address}.
3. The numeric value of the current destination byte, the
8-bit contents of the byte location pointed to by the
current destination address in bit positions 13-31 of
register {Ru 1}.
Affected: (DBS), {Ru 1} Trap: Instruction exception
translated (DBS) - DBS
The R field of the TBS instruction must be an even value for
proper operation of the instruction;
if
the R field of TBS is
en odd value, the instruction traps to location X ' 4D',
instruction exception trap.
If
TBS is indirectly addressed, it is treated as a nonexistent
instruction. The basic processor unconditionally aborts
execution of the instruction (at the time of operation code
decoding) and traps to location X'40' with the contents of
register R and the destination byte string unchanged.
See IITraps By Byte String Instructions" (in this section) for
other trap conditions. Note that the check for access trap
conditions is done only for the source byte string.
Case I, even, nonzero R field (Ru1=R+l)
Contents of register R:
90 Byte-String Instructions
Contents of register R+l:
The destination byte string begins with the byte location
pointed to by the destination address in register R + 1 and
is C bytes in length. The source byte string {translation
table} begins with the byte location pointed to by the dis-
placement in TBS plus the. source address in register R.
When the instruction is completed, the destination address
is incremented by C, C is set to zero, and the source ad-
dress remains unchanged.
Case II, odd R fi e Id {Ru 1 =R}
Because of the interruptible nature of TRANSLATE BYTE
STRING, the instruction traps with the contents of register R
unchanged when an odd-numbered general register is speci-
fied by the R field of the instruction word.
Case III, zero R field {Ru1=1}
Contents of register 1:
The destination byte string begins with the byte location
pointed to by the destination address in register 1 and
is C bytes in length. The source byte string {translation
table} begins with the location pointed to by the displace-
ment in TBS. When the instruction is completed, the desti-
nation address is incremented by C and C is set to zero.
TTBS
TRANSLATE AND TEST BYTE STRING
{Immediate displacement, continue after interrupt}
TRANSLATE AND TEST BYTE STRING compares the mask
in bit positions 0-7 of register R with source bytes in a byte
translation table. The destination byte string begins with
the byte location pointed to by the destination address in
register Rul, and is C bytes in length. The byte translation
table and the translation bytes themselves are identi cal to
that described for the instruction TRANSLATE BYTE STRING.
The destination byte string is examined (without being
changed) unti I a translation byte {source byte} is found that
contains a 1 in any of the bit positions selected by a 1 in
the mask. When such a translation byte is found, TTBS
replaces the mask with the logical product (AND) of the
transiation byte and the mask, and terminates with CC4
set to
1.
If the TTBS instruction terminates due to the above condi-
tion, the count (C) in register Rul is one greater than
the number of bytes remaining to be compared and the
destination address in register Rul indicates the location