SOLTEK SL-65DVB User Manual page 51

CMOS Setup Utility - Copyright (C) 1984-2000 Award Software
Bank 0/1 DRAM Timing
Bank 2/3 DRAM Timing
Bank 4/5 DRAM Timing
SDRAM Cycle Length
DRAM Clock
Memory Hole
Read Around Write
Concurrent PCI/Host
System BIOS Cacheable
Video RAM Cacheable
AGP Aperture Size
AGP 2X Mode
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
USB Keyboard Support
OnChip Sound
OnChip Modem
OnChip USB
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
Advanced Chipset Features
SDRAM 10ns
SDRAM 10ns
SDRAM 10ns
3
Host CLK
Disabled
Disabled
Disabled
Disabled
Disabled
64M
Enabled
Enabled
Disabled
Enabled
Enabled
Enabled
Disabled
Disabled
Disabled
Enabled
Disabled
Enabled
65DVB/65DV2
Item Help
Menu Level
51