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RS-200-RPS-D
Motherboard
User's Manual
Date of Publicatoin: December 1,2003

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Summary of Contents for Advantech RS-200-RPS-D

  • Page 1 RS-200-RPS-D Motherboard User's Manual Date of Publicatoin: December 1,2003...
  • Page 2: Preface

    3.20 GHz at a 533/400 MHz front side bus. Please refer to the support section of our web site ( http:// service.advantech.com.tw/eservice) for a complete listing of supported pro- cessors. This product is intended to be professionally installed. Manual Organization Chapter 1 describes the features, specifications and performance of the motherboard and provides detailed information about the chipset.
  • Page 3: Table Of Contents

    Table of Contents Preface About This Manual ......................2 Manual Organization ..................... 2 Chapter 1: Introduction Overview ......................1-1 Image ......................1-1 Layout ......................1-2 Quick Reference ..................1-3 Motherboard Features ................1-4 Intel E7501 Chipset: System Block Diagram ........1-5 Chipset Overview ...................
  • Page 4 Table of Contents Chassis Intrusion ..................2-9 Universal Serial Bus (USB0/1) .............. 2-9 Extra Universal Serial Bus Headers (USB2/3) ........2-9 Serial Ports ..................... 2-10 GLAN1/2 (Ethernet Ports) ..............2-10 Fan Headers ................... 2-10 Power LED/Speaker/NMI Header ............2-10 Third Power Supply Fail Header ............2-11 ATX PS/2 Keyboard and Mouse Ports ..........
  • Page 5 SUPER X5DP8-G2/DPE-G2/DPR-8G2+/DPR-iG2+/DPi-G2 User's Manual Chapter 4: BIOS Introduction ....................... 4-1 Running Setup ....................4-2 Main Setup ......................4-2 Advanced Setup ....................4-6 Security Setup ....................4-15 Power Setup ....................4-17 Boot Setup ...................... 4-19 PIR Setup ......................4-20 Exit ........................4-22 Appendices: Appendix A: BIOS POST Messages ..............
  • Page 6: Chapter 1: Introduction

    Chapter 1: Introduction Chapter 1 Introduction Overview Figure 1-1. Image (not drawn to scale)
  • Page 7: Layout

    Chapter 1: Introduction Figure 1-2. Layout* (not drawn to scale) Keyboard DIMM #1A ATX POWER BANK 1 Mouse DIMM #1B USB0/1 DIMM #2A CPU1 JP36 BANK 2 DIMM #2B COM1 DIMM #3A CPU1 Chassis FAN BANK 3 DIMM #3B CPU2 Chassis FAN CPU2 M C H JP38...
  • Page 8: Quick Reference

    Chapter 1: Introduction Quick Reference Jumper Description Default Setting JBT1 CMOS Clear See Jumper Section Speaker Enable Pins 6-7(Enabled) JPA1/JPA2 SCSI Channel A/B Termination Open (Terminated) GLAN Enable/Disable Pins 1-2 (Enabled) VGA Enable/Disable Pins 1-2 (Enabled) Power Fail Alarm En/Disable Open (Disabled) JP22 SCSI Enable/Disable...
  • Page 9: Motherboard Features

    GHz at a 533/400 MHz front side (system) bus speed. Note: Please refer to the support section of our web site for a complete listing of supported processors (http://service.advantech.com.tw/eservice). M e m o r y • Six 184-pin DIMM sockets supporting up to 12 GB of registered ECC DDR-266/200 SDRAM Note: Interleaved memory;...
  • Page 10 Chapter 1: Introduction ACPI Features (optional) • Microsoft OnNow • Slow blinking LED for suspend state indicator • Main switch override mechanism Onboard I/O • AIC-7902 for dual channel Ultra320 SCSI • Integrated ATI Rage XL graphics controller • Intel 82546EB dual port Gigabit LAN (Ethernet) controller •...
  • Page 11: Intel E7501 Chipset: System Block Diagram

    Chapter 1: Introduction Processor 1 Processor 0 ATA 100 533/400 MHz System Bus Ports Graphics USB 1.1 Ports Dual GLAN & SXB ICH3-S P64H2 SCSI & Slim PCI Slot SMBus SXB = Supermicro Extended 266 MHz Memory Bus Super IO Bus PCI Slot 2-Channel DDR SDRAM Figure 1-3.
  • Page 12: Chipset Overview

    Chapter 1: Introduction Chipset Overview The Intel E7501 chipset is a high-performance chipset with a performance and feature-set designed for mid-range, dual processor servers. E7501 chipset consists of four major components: the Memory Controller Hub (MCH), the I/O Controller Hub 3 (ICH3), the PCI-X 64-bit Hub 2.0 (P64H2) and the 82808AA Host Channel Adapter (VxB).
  • Page 13: Pc Health Monitoring

    Chapter 1: Introduction PC Health Monitoring This section describes the PC health monitoring features of the motherboard. All have an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU Cores, Chipset Voltage, +3.3V, +5V, +12V and +3.3V Standby An onboard voltage monitor will scan these voltages continuously.
  • Page 14: Acpi Features

    Chapter 1: Introduction CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS. This allows the user to define an overheat tempera- ture. When this temperature is exceeded, both the overheat fan and the warning LED are triggered.
  • Page 15 Chapter 1: Introduction Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re- quests.
  • Page 16: Power Supply

    It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above. It must also be SSI compliant (info at http://service.advantech.com.tw/eservice). Additionally, in areas where noisy power transmission is present, you may choose to install a line filter to shield the computer from noise.
  • Page 17 Chapter 1: Introduction provides two high-speed, 16550 compatible serial communication ports (UARTs), one of which supports serial infrared communication. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor inter- rupt system.
  • Page 18: Chapter 2: Installation

    Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electric-Static-Discharge (ESD) can damage electronic components. To pre- vent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.
  • Page 19: Pga Processor And Heatsink Installation

    Chapter 2: Installation PGA Processor and Heatsink Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. Also, do not place the motherboard on a conductive surface, which can damage the BIOS battery and prevent the system from booting up. IMPORTANT: Always connect the power cord last and always remove it before adding, removing or changing any hardware components.
  • Page 20 Chapter 2: Installation 4. Secure the other retention bracket into position by repeating Step 3. 5. Lift the lever on the CPU socket: lift the lever completely or you will Socket lever damage the CPU socket when power is applied. (Install CPU1 first.) 6.
  • Page 21 Chapter 2: Installation IMPORTANT! Please note that special, new silver heatsink retention clips must be used with all Xeon 533 MHz FSB (front side bus) 604-pin processors. These new retention clips have “604P” clearly marked on them. Using the old clips will not keep the proper amount of pressure applied and may cause the processor to overheat.
  • Page 22: Installing Dimms

    Chapter 2: Installation Installing DIMMs CAUTION: Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Also note that the memory is interleaved to improve performance (see step 1). DIMM Installation (See Figure 2-2) 1. Insert the desired number of DIMMs into the memory slots, starting with Bank 1.
  • Page 23: I/Oports/Control Panel Connectors

    Chapter 2: Installation I/OPorts/Control Panel Connectors The I/O ports are color coded in conformance with the PC 99 specification. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. I/O Port Locations and Definitions Notes: COM2 is a header located on the motherboard - see the motherboard layout pages in Chapter 1 for location.
  • Page 24: Connecting Cables

    Chapter 2: Installation Connecting Cables AT X Power Supply 20-pin Connector Pin N umber Definition Pin Number Definition ATX Power Connection +3.3V +3.3V -12V +3.3V CO M PS_ON The motherboard has the 20-pin connector. See the tables on the CO M right for pin definitions.
  • Page 25: Nic1 Led

    Chapter 2: Installation NIC1 LED N IC1 LED Pin Definitions The NIC1 (Network Interface Con- (JF2) troller) LED connection is located Number Definition on pins 11 and 12 of JF2. Attach the NIC1 LED cable to display net- GN D work activity.
  • Page 26: Power Button

    Chapter 2: Installation Power Button The Power Button connection is Power Butto n Connector located on pins 1 and 2 of JF2. Pin Definitions (JF2) Momentarily contacting both pins will power on/off the system. This Number Definition PW _O N button can also be configured to Ground function as a suspend button (see...
  • Page 27: Serial Ports

    Chapter 2: Installation Serial Ports Serial Port Pin Definitions (COM1, COM2) The COM1 serial port is beside Pin Number Definition Pin Number Definition USB (see Figure 2-3). See the table on the right for pin defini- tions. The COM2 connector is a Ground header on the motherboard (1-2 Note: Pin 10 is included on the header but not on...
  • Page 28: Third Power Supply Fail Header

    Chapter 2: Installation Third Power Supply Fail Header Connect a cable from your power T hird Power Sup ply Fail Header Pin Definitions (JP8) supply to the JP8 header to pro- vide warning of power supply fail- Number Definition P/S 1 Fail Signal ure.
  • Page 29: Keylock

    Chapter 2: Installation Keylock The keyboard lock connection is located on JP35. Utilizing this header allows you to inhibit any actions made on the keyboard, effectively "locking" it. Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be Connector Pins used...
  • Page 30: Cmos Clear

    Chapter 2: Installation CMOS Clear JBT1 is used to clear CMOS. In- stead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS. To clear CMOS: 1) First power down the system and unplug the power cord(s). 2) With the power disconnected, short the CMOS pads with a metal object such as a small screwdriver.
  • Page 31: Scsi Enable/Disable

    Chapter 2: Installation SCSI Enable/Disable The SCSI Termination jumper at SCSI Enable/Disable JP22 allows you to enable or dis- Jumper Settings able the onboard SCSI controller. (JP22) Jumper The normal (default) position is on Position Definition pins 1-2 to enable SCSI termina- Pins 1-2 Enabled Pins 2-3...
  • Page 32: Onboard Indicators

    Chapter 2: Installation Onboard Indicators GLAN1/GLAN2 LEDs GLAN Right LED Indicator The Ethernet ports (located beside Color Definition the VGA port) have two LEDs. No Connection Green 100 MHz See the table on the right for the Orange 1 GHz functions associated with these LEDs.
  • Page 33: Ide Connectors

    Chapter 2: Installation IDE Connectors IDE Connector Pin Definitions (IDE#1, IDE#2) Pin Number Function Pin Number Function There are no jumpers to Reset IDE G ND Host Data 7 Host Data 8 configure the onboard Host Data 6 Host Data 9 Host Data 5 Host Data 10 IDE#1 and #2 connec-...
  • Page 34: Chapter 3: Troubleshooting

    1. Please go through the "Troubleshooting Procedures" and "Frequently Asked Question" (FAQ) sections in this chapter or see the FAQs on our web site (http://service.advantech.com.tw/eservice) before con- tacting Technical Support. 2. BIOS upgrades can be downloaded from our web site at http://service.advantech.com.tw/eservice...
  • Page 35: No Video

    Chapter 3: Troubleshooting No Video 1. If the power is on but you have no video, remove all the add-on cards and cables. 2. Use the speaker to determine if any beep codes exist. Refer to the Appendix for details on beep codes. NOTE: If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended.
  • Page 36: 3-3 Frequently Asked Questions

    Answer: It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system. Updated BIOS files are located on our web site (http://service.advantech.com.tw/eservice). Please check our BIOS warning message and the info on how to update your BIOS on our web site.
  • Page 37: Chapter 4: Bios

    Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to our web site (http://service.advantech.com.tw/eservice) for any changes to BIOS that may not be reflected in this manual.
  • Page 38: Running Setup

    Chapter 4: BIOS Running Setup *Default settings are in bold text unless otherwise noted. The BIOS setup options described in this section are selected by choos- ing the appropriate text from the main BIOS Setup screen. All displayed text is described in this section, although the screen display is often all you need to understand how to set the options (see on next page).
  • Page 39: Main Setup

    Chapter 4: BIOS Main BIOS Setup Menu Phoenix BIOS Setup Utility Main Advanced Security Power Boot Exit Item Specific Help System Time [16:19:20] System Date [02/02/02] Legacy Diskette A: [1.44/1.25 MB] Legacy Diskette B: [Not Installed] Primary Master [120 GB] Primary Slave [None] Secondary Master...
  • Page 40: Legacy Diskette A

    Chapter 4: BIOS Legacy Diskette A This setting allows the user to set the type of floppy disk drive installed as diskette A. The options are Disabled, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5 in, 1.44/1.25MB, 3.5 in and 2.88MB 3.5 in. Legacy Diskette B This setting allows the user to set the type of floppy disk drive installed as diskette B.
  • Page 41 Chapter 4: BIOS Type Selects the type of IDE hard drive. The options are Auto (allows BIOS automatically determine the hard drive's capacity, number of heads, etc.), a number from 1-39 to select a predetermined type of hard drive, CD-ROM and ATAPI Removable. Multi-Sector Transfers Select the number of transfer sectors.
  • Page 42: Advanced Setup

    Chapter 4: BIOS Advanced Setup Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. The items with a triangle beside them have sub menus that can be accessed by highlighting the item and pressing <Enter>.
  • Page 43 Chapter 4: BIOS PCI/PnP Configuration Access the submenu to make changes to the following settings. Onboard LAN1 OPROM Configure Enabling this option provides the ability to boot from LAN1. The options are Enabled and Disabled. Onboard LAN2 OPROM Configure Enabling this option provides the ability to boot from LAN2. The options are Enabled and Disabled.
  • Page 44 Chapter 4: BIOS PCI Slot Configuration PCI/PCIX Frequency (Slot 1-3) Use this setting to change the speed of PCI/PCIX slots 1 though 3. Options are Auto, 33 MHz, 66 MHz, 100 MHz and 133 MHz. PCI/PCIX Frequency (Slot 4) Use this setting to change the speed of PCI/PCIX slot 4. Options are Auto, 33 MHz, 66 MHz, 100 MHz and 133 MHz.
  • Page 45 Chapter 4: BIOS Large Disk Access Mode This setting determines how large hard drives are to be accessed. The options are DOS or Other (for Unix, Novellle NetWare and other operating systems). Local Bus IDE Adapter Use this setting to enable the integrated local bus IDE adapter. Options are Disable, Primary, Secondary and Both.
  • Page 46 Chapter 4: BIOS Serial Port A This setting allows you to assign control of serial port A. The options are Enabled (user defined), Disabled and Auto (BIOS controlled). Base I/O Address Select the base I/O address for serial port A. The options are 3F8, 2F8, 3E8 and 2E8.
  • Page 47 Chapter 4: BIOS Interrupt Select the IRQ (interrupt request) for the parallel port. Options are IRQ5 and IRQ7. Mode Specify the parallel port mode. Options are Output Only, Bi-directional, EPP and ECP. DMA Channel Specify the DMA channel. Options are DMA1 and DMA3. Floppy Disk Controller This setting allows you to assign control of the floppy disk controller.
  • Page 48 Chapter 4: BIOS ECC Configuration This setting lets you enable or disable ECC (Error Correction and Checking). The options are ECC and Disabled. ECC Error Type This setting lets you select which type of interrupt will be activated as a result of an ECC error.
  • Page 49 Chapter 4: BIOS Split Lock Operations This setting allows you to Enable or Disable split lock operations. Hyper-threading This setting allows you to Enable or Disable hyper-threading. Enabling hyper-threading results in increased CPU performance. L3 Cache This setting allows you to Enable or Disable the L3 cache. DMI Event Logging Access the submenu to make changes to the following settings.
  • Page 50 Chapter 4: BIOS Clear All DMI Event Logs Select Yes and press <Enter> to clear all DMI event logs. Console Redirection Access the submenu to make changes to the following settings. COM Port Address Specifies to redirect the console to On-board COMA or On-board COMB. This setting can also be Disabled.
  • Page 51 Chapter 4: BIOS Security Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. Security setting options are displayed by highlighting the setting using the arrow keys and pressing <Enter>. All Security BIOS settings are described in this section.
  • Page 52 Chapter 4: BIOS Set Supervisor Password When the item "Set Supervisor Password" is highlighted, hit the <Enter> key. When prompted, type the Supervisor's password in the dialogue box to set or to change supervisor's password, which allows access to BIOS. Set User Password When the item "Set User Password"...
  • Page 53 Chapter 4: BIOS Power Choose Power from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. Power setting options are displayed by highlighting the setting using the arrow keys and pressing <Enter>. All Power BIOS settings are described in this section.
  • Page 54 Chapter 4: BIOS Suspend Timeout Use this setting to specify the period of system inactivity to transpire before entering the suspend state. Options are Off, 5 min, 10 min, 15 min, 20 min, 30 min, 40 min and 60 min. Resume on Time Select either Off or On, which will wake the system up at the time specified in the next setting.
  • Page 55 Chapter 4: BIOS Boot Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. Highlighting a setting with a + or - will expand or collapse that entry. See details on how to change the order and specs of boot devices in the Item Specific Help window.
  • Page 56 Chapter 4: BIOS Choose PIR from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. The items with a triangle beside them have sub menus that can be accessed by highlighting the item and pressing <Enter>. PIR stands for "Processor Info ROM", which allows BIOS to read certain information from the processors.
  • Page 57 Chapter 4: BIOS Processor Info ROM Data Highlight this and hit <Enter> to see PIR data on the following items: Header Info Processor Data Processor Core Data L3 Cache Data Package Data Part Number Data Thermal Reference Data Feature Data Other Data OEM Data Hardware Monitor Logic...
  • Page 58: Exit

    Chapter 4: BIOS Chassis Fan 2 Processor Vcore 3.3V Standby 3.3V Vcc 5V Vcc 12V Vcc 1.8V Vcc -12V Vcc Exit Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys. You should see the following display. All Exit BIOS settings are described in this section.
  • Page 59 Chapter 4: BIOS Exit Saving Changes Highlight this item and hit <Enter> to save any changes you made and to exit the BIOS Setup utility. Exit Discarding Changes Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving any changes you may have made.
  • Page 60: Appendix Abios Post Messages

    Appendix A: BIOS POST Messages Appendix A BIOS POST Messages During the Power-On Self-Test (POST), the BIOS will check for problems. If a problem is found, the BIOS will activate an alarm or display a message. The following is a list of such BIOS messages.
  • Page 61 Appendix A: BIOS POST Messages System CMOS checksum bad - Default configuration used System CMOS has been corrupted or modified incorrectly, perhaps by an application program that changes data stored in CMOS. The BIOS installed Default Setup Values. If you do not want these values, enter Setup and enter your own values.
  • Page 62 Appendix A: BIOS POST Messages System cache error - Cache disabled RAM cache failed and BIOS disabled the cache. On older boards, check the cache jumpers. You may have to replace the cache. See your dealer. A disabled cache slows system performance considerably. CPU ID: CPU socket number for Multi-Processor error.
  • Page 63 Appendix A: BIOS POST Messages Fixed Disk n Fixed disk n (0-3) identified. Invalid System Configuration Data Problem with NVRAM (CMOS) data. I/O device IRQ conflict I/O device IRQ conflict error. PS/2 Mouse Boot Summary Screen: PS/2 Mouse installed. nnnn kB Extended RAM Passed Where nnnn is the amount of RAM in kilobytes successfully tested.
  • Page 64 Appendix A: BIOS POST Messages Parity Check 2 nnnn Parity error found in the I/O bus. BIOS attempts to locate the address and display it on the screen. If it cannot locate the address, it displays ????. Press <F1> to resume, <F2> to Setup, <F3> for previous Displayed after any recoverable error message.
  • Page 65: Appendix Bbios Post Codes

    Appendix B: BIOS POST Codes Appendix B BIOS POST Codes This section lists the POST (Power On Self Test) codes for the PhoenixBIOS. POST codes are divided into two categories: recoverable and terminal. Recoverable POST Errors When a recoverable type of error occurs during POST, the BIOS will display an POST code that describes the problem.
  • Page 66 Appendix B: BIOS POST Codes POST Code Description 8254 timer initialization 8237 DMA controller initialization Reset Programmable Interrupt Controller 1-3-1-1 Test DRAM refresh 1-3-1-3 Test 8742 Keyboard Controller Set ES segment register to 4 GB Auto size DRAM Initialize POST Memory Manager Clear 512 kB base RAM 1-3-4-1 RAM failure on address line xxxx* 1-3-4-3 RAM failure on data bits xxxx* of low byte of...
  • Page 67 Appendix B: BIOS POST Codes POST Code Description Test RAM between 512 and 640 kB Test extended memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup System Management Mode (SMM) area Display external L2 cache size Load custom defaults (optional) Display shadow-area message...
  • Page 68 Appendix B: BIOS POST Codes POST Code Description Check for SMART Drive (optional) Shadow option ROMs Set up Power Management Initialize security engine (optional) Enable hardware interrupts Determine number of ATA and SCSI drives Set time of day Check key lock Initialize typematic rate Erase F2 prompt Scan for F2 key stroke...
  • Page 69 Appendix B: BIOS POST Codes POST Code Description Re-map I/O and memory for PCMCIA Initialize digitizer and display message Unknown interrupt The following are for boot block in Flash ROM POST Code Description Initialize the chipset Initialize the bridge Initialize the CPU Initialize system timer Initialize system I/O Check force recovery boot...

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