Legacy Lvds Digital Data Channels - FLIR Tau Camera TAU-0035-00-10 User Manual

4—Tau Digital Data Channel
4.5

Legacy LVDS Digital Data Channels

The camera provides two LVDS digital ports.
• Port 1 consists of the signals DATA_CLK+, DATA_SYNC+, and DATA1_OUT+.
• Port 2 (DATA2_OUT+ and DATA2_OUT-) is currently undefined—do not connect to
these signals.
Note
14-bit and 8-bit timing and format are identical except only 8 bits (LSBs) are available in 8-bit
mode.
DATA2_OUT+ and DATA2_OUT- are currently undefined—do not connect to these signals
All signals in the digital data interface employ low-voltage differential signaling (LVDS).
The clock rate of DATA_CLK+ is 73.636 MHz.
The timing of the digital data interface is shown in Figure 4-4 and Figure 4-6.
The format of the digital output shall be is in Figure 4-5.
F = frame sync; logic high on the first four words starting the frame, logic low otherwise
L = line sync; logic high during valid pixel data, logic low otherwise
4-8
Figure 4-4: Digital Data Timing
June 2011
Tau User's Manual
TAU-0035-00-10, version 150