Xp Bus Setting-Cmos Digital Interface - FLIR Tau Camera TAU-0035-00-10 User Manual

Tau User's Manual
4.2 XP Bus Setting—CMOS Digital Interface
The CMOS interface is a parallel output that allows the user to access 8-bit AGC corrected data
or 14-bit data. The signal levels are 0 - 3.3 V CMOS logic and are intended to drive boards
mounted directly to the Tau camera. CMOS is not intended to drive a cable. An XP-board
reference design is available upon request.
Table 4-2 shows the connector pin definitions with CMOS enabled.
Note
The optional discrete input pins should be unloaded when using the CMOS output.
50-pin Hirose connector interface with CMOS output enabled
Table 4-2:
Pin #
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47, 49
TAU-0035-00-10, version 150
Signal Name Pin #
RS232_TX 2
CMOS_LINE_VALID 4
DGND 6
unused 8
LVDS_CLK_P 10
LVDS_SYNC_P 12
LVDS_DATA_P 14
unused 16
DGND 18
DISCRETE0 20
EXTERNAL_SYNC 22
CMOS_DATA11 24
CMOS_DATA9 26
DGND 28
CMOS_DATA7 30
CMOS_DATA5 32
CMOS_DATA3 34
CMOS_DATA1 36
DGND 38
CMOS_CLK 40
DGND 42
VID_OUT_H 44
DGND 46
MAIN_PWR_RTN 48, 50
June 2011
4—Tau Digital Data Channel
Signal Name
RS232_RX
CMOS_FRAME_VALID
DGND
unused
LVDS_CLK_N
LVDS_SYNC_N
LVDS_DATA_N
unused
DGND
CMOS_DATA13
CMOS_DATA12
CMOS_DATA 10
CMOS_DATA8
DGND
CMOS_DATA6
CMOS_DATA4
CMOS_DATA2
CMOS_DATA0
DGND
unused
DGND
VID_OUT_L
3V3
MAIN_PWR
4-3