Status, Error And Srq Registers; General Description; Conditional Registers - TDK-Lambda GENESYS 750W User Manual

7.11

Status, Error and SRQ Registers

7.11.1

General Description

This Section describes the structure and operation of the six status, error, and SRQ
registers. The registers can be set or red via RS232/RS485 commands.
Refer to Fig. 7-7 for the Status and Error Registers Diagram.
These registers operate in a way that is similar to the IEEE-488 and SCPI registers (as used
by the Genesys
Constant Voltage
Constant Current
No Fault
Fault
Auto Start
Fold Enabled
Spare
Local Mode
Spare
AC Fail
Over Temperature
Foldback (tripped)
Over Volt Prot
Shut Off (rear panel)
Output Off (front panel)
Enable Open

7.11.2 Conditional Registers

The fault Condition Register and the Status Condition Register are read only registers
that the user may read to see the condition of the Power supply. Refer to Table 7-8 for
description of the Fault Condition Register bits and Table 7-9 for the Status Condition
register bits.
TM
with the "-IEMD" option, but the structure and command set is different.
Command Error ("Cnn")
Execution Error ("Enn")
Query Response ("message")
Command Response ("OK")
Status Registers
Condition
Enable
LSB
0
CV
1
CC
2
NFLT
3
FLT
4
0
AST
5
0
FDE
6
0
0
MSB
7
LCL
"STAT?" "SENA xx"
"SENA?"
Fault Registers
Condition
LSB
0
0
1
AC
2
OTP
3
FLD
4
OVP
5
SO
6
OFF
MSB
7
ENA
"FLT?" "FENA xx"
"FENA?"
Fig.7-7: Status and Error Registers Diagram
83507013 Rev G
NOTE
Event
CV
CC
NFLT
FLT
0
0
0
LCL
"SEVE?"
Event
Enable
0
AC
OTP
FLD
OVP
SO
OFF
ENA
"FEVE?"
87
One response for every command
or query received.
Response
messages
"Inn" and CR
SRQ
Messages
One SRQ when SEVE goes
from all zeroes to any bit set.
Setting more SEVE bits does
not cause more SRQs.
Positive Logic:
0 = No Event
1 = Event Occured
Serial
TXD