Figure 3-2. Pci-Mio-16Xe-10 And Pci-6031E Block Diagram - National Instruments DAQ PCI E Series User Manual

Chapter 3 Hardware Overview
Voltage
REF
(8)*
Analog
Muxes
(8)*
Calibration
Mux
2
Trigger Level
DACs
Trigger
PFI / Trigger
Timing
Digital I/O (8)
DAC0
DAC1
* (32) for the PCI-6031E
PCI E Series User Manual
Figure 3-2 shows a block diagram for the PCI-MIO-16XE-10 and
PCI-6031E.
Calibration
DACs
3
+
Mux Mode
Programmable
Selection
Gain
Switches
Amplifier
–
Analog
Trigger
Circuitry
Trigger
Counter/
Timing I/O
Digital I/O
DAC
FIFO
Calibration
4 DACs

Figure 3-2. PCI-MIO-16XE-10 and PCI-6031E Block Diagram

REF
Buffer
2
16-Bit
Sampling
ADC
A/D
FIFO
Converter
Configuration
AI Control
Memory
DMA/
Analog Input
Interrupt
Timing/Control
Request
Bus
DAQ - STC
Interface
Analog Output
RTSI Bus
Timing/Control
Interface
AO Control
Data (16)
RTSI Bus
3-2
Control
Generic
PCI
Bus
MITE Bus
Interface
Interface
Address/Data
EEPROM
IRQ
DMA
Analog
EEPROM DMA
Input
Control Interface
Control
DAQ-STC
MIO
Bus
Interface
Interface
I/O
Analog
Bus
Output
Interface
Control
© National Instruments Corporation