Trig1 Signal; Figure 4-15. Extstrobe* Signal Timing - National Instruments DAQ PCI E Series User Manual

Chapter 4 Signal Connections
PCI E Series User Manual
Figure 4-15 shows the timing for the hardware-strobe mode
EXTSTROBE* signal.
V OH
V OL

Figure 4-15. EXTSTROBE* Signal Timing

TRIG1 Signal

Any PFI pin can externally input the TRIG1 signal, which is available
as an output on the PFI0/TRIG1 pin.
Refer to Figures 4-12 and 4-13 for the relationship of TRIG1 to the
DAQ sequence.
As an input, the TRIG1 signal is configured in the edge-detection mode.
You can select any PFI pin as the source for TRIG1 and configure the
polarity selection for either rising or falling edge. The selected edge
of the TRIG1 signal starts the data acquisition sequence for both
posttriggered and pretriggered acquisitions. The PCI-MIO-16E-1,
PCI-MIO-16E-4, PCI-MIO-16XE-10, PCI-6031E, PCI-6032E,
PCI-6033E, and PCI-6071E, support analog triggering on the
PFI0/TRIG1 pin. See Chapter 3, Hardware Overview, for more
information on analog triggering.
As an output, the TRIG1 signal reflects the action that initiates a DAQ
sequence. This is true even if the acquisition is being externally
triggered by another PFI. The output is an active high pulse with a
pulse width of 50 to 100 ns. This output is set to tri-state at startup.
t
t
w
w
t
= 600 ns or 5 s
w
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