TRIG1
TRIG2
STARTSCAN
CONVERT*
Scan Counter
© National Instruments Corporation
Don't Care
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2
1
SCANCLK Signal
SCANCLK is an output-only signal that generates a pulse with the
leading edge occurring approximately 50 to 100 ns after an A/D
conversion begins. The polarity of this output is software-selectable but
is typically configured so that a low-to-high leading edge can clock
external analog input multiplexers indicating when the input signal has
been sampled and can be removed. This signal has a 400 to 500 ns pulse
width and is software enabled. Figure 4-14 shows the timing for the
SCANCLK signal.
CONVERT*
SCANCLK
EXTSTROBE* Signal
EXTSTROBE* is an output-only signal that generates either a single
pulse or a sequence of eight pulses in the hardware-strobe mode. An
external device can use this signal to latch signals or to trigger events.
In the single-pulse mode, software controls the level of the
EXTSTROBE* signal. A 10 µs and a 1.2 µs clock are available for
generating a sequence of eight pulses in the hardware-strobe mode.
0
2
2
Figure 4-13. Typical Pretriggered Acquisition
t
d
t
= 50 to 100 ns
d
t
= 400 to 500 ns
w
Figure 4-14. SCANCLK Signal Timing
4-29
Chapter 4
Signal Connections
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1
0
t
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PCI E Series User Manual