Testability; Power Measurement Support; Table 13. System Power Management M-States - Intel Core 2 Duo Processor User Manual

Table 13. System Power Management M-States

M States System
States
M0 S0
M1 S3-S5
M-off S3-S5
The development board also supports CLKRUN#.
3.8

Testability

The development board provides an Extended Debug Port (XDP) for testing at J1F1
and direct processor probing. The XDP interface is backwards compatible with the
older ITP interface as well. The user must use an XDP or ITP interface that is
compatible with the Intel® Core™ 2 Duo processor T9400.
Note: The XDP interface is backwards compatible with the ITP interface. However, an XDP to
ITP converter cable is necessary to use the older ITP tools. Also, in some cases a
resistor change rework is necessary to get the older ITP tools to function properly.
Please contact your Intel representative for additional details.
3.9

Power Measurement Support

Power measurement resistors are provided on the platform to measure the power of
most subsystems. All power measurement resistors have a tolerance of 1%. The value
of these power measurement resistors are 2mΩ by default. Power on a particular
subsystem is calculated using the following formula:
2
V
=
P
R
R = value of the sense resistor (typically 0.002Ω)
V = the voltage difference measured across the sense resistor.
It is recommended that the user use a high precision digital multi-meter tool such as
the Agilent 34401A digital multi-meter. Refer to
precision digital multi-meter (Agilent 34401A) versus a standard precision digital
multi-meter (Fluke 79).
40
Power Wells
All wells powered Powered
Main well down In self refresh; ME DRAM
controller on using
Channel A
Main well down Powered off (or self
refresh)
Development Board Features
DRAM
Clock chip powered and PLL,
DLL in use
Clock Chip powered with only
the GMCH clock running and
PLL, DLL in use
None, Intel ME powered off
T able 14 for a comparison of a high
2
Development Kit User's Manual
Intel ME Clocking