Processor Active Cooling; Manual Processor Voltage Id (Vid) Support; Chipset; System Memory - Intel Core 2 Duo Processor User Manual

Development Board Features
3.6.5

Processor Active Cooling

The system supports PWM based FAN speed control. Fan circuitry is controlled by the
signal CPU_PWM_FAN signal from the EC (PWM signal from the H8 is driven high to
3.3 V and low to 0 V at about 40 kHz carrier frequency).
A 3-pin header J2B3 is provided to support FAN Tacho output measurement for the
CPU.
3.6.6

Manual Processor Voltage ID (VID) Support

The development board supports manual VID operation for processor VR. A jumper
J2B2 is provided to incorporate "VID override" to allow the overriding of CPU VID
outputs to the CPU VCC Core VR. The intent of this "VID override' circuit is for ease of
debug and testing.
3.6.7

Chipset

The Intel® GM45 Express Chipset (GM45 Chipset) is included on the development
board. The chipset consists of the GM45 Graphics and Memory Controller Hub (GM45
GMCH) and the ICH9M I/O Controller Hub.
The GM45 GMCH provides a processor interface at 667, 800 or 1067 MHz and two
DDR3 memory interfaces running at 800 or 1067 MT/s. It supports internal graphics
(integrated LVDS, 2 SDVO channels, VGA, TVO, Display port) as well as external
graphics (through ADD-in card on a X16 PCI Express Graphics slot). It also supports a
manageability engine (Manageability JTAG signals brought to test point/8-pin header)
and is connected to the ICH device via a DMI bus.
The ICH features twelve USB 2.0/1.1 compatible ports (six back panel, five front panel
USB ports and one port to docking), 4 Serial ATA channels (two cable connects, one
direct connect, one eSATA port) , an Intel® High Definition Audio (Intel® HD Audio)
digital link, PCI 2.3 compliant interface (no slots on board, slots provided on thimble
peak card), LPC bus, six general purpose PCI Express 1.1a compliant lanes in which
sixth PCI Express lane is used for Gigabit LAN interface. ICH9M also provides
Manageability support (controller link to GMCH and to wireless LAN).
3.6.8

System Memory

The development board supports a dual channel DRR3 interface. There are two DDR3
SO-DIMM sockets (J4P1 & J4N1) on the development board. The GMCH supports four
ranks of memory at 800 or 1067 MT/s on the board. The maximum amount of
memory supported on the Intel® GM45 Express Chipset is 8 GB of DDR3 memory by
utilizing 2 Gb technology in stacked SO-DIMMs and 4 GB of DDR3 memory by utilizing
2 Gb technology in non-stacked SO-DIMMs. Minimum capacity supported is 256 MB
using 512 Mb technology. There is no ECC support on this development board.
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