Table 3. Acronyms - Intel Core 2 Duo Processor User Manual

Development kit with ddr3 system memory
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Introduction
Term/Acronym
Pin
Silver Cascade
System Bus
System
Management Bus
VCC (CPU core)
Table 3
defines the acronyms used throughout this document.

Table 3. Acronyms

Acronym
AC
ACPI
ADD2
ADD2N
AGTL or AGTL+
AMI
AMPS or iAMPS
AMT or iAMT
ATA
ATX
BGA
BIOS
BSEL
CL
CMOS
COM
CPU
CRB
DC
DC
DDR
DDR2
DDR3
Development Kit User's Manual
The contact point of a component package to the traces on a substrate,
such as the motherboard. Signal quality and timings may be measured at
the pin.
The name of the development board in this development kit that uses
DDR3 SDRAM
The System Bus is the microprocessor bus of the processor.
A two-wire interface through which various system components may
communicate.
VCC (CPU core) is the core power for the processor. The system bus is
terminated to VCC (CPU core).
Alternating Current
Advanced Configuration and Power Interface
Advanced Digital Display 2
Advanced Digital Display 2 Normal
Assisted Gunning Transceiver Logic (See also Table 2 above)
American Megatrends Inc. (BIOS developer)
(Intel) Adaptive Mobile Power System
(Intel) Active Management Technology
Advanced Technology Attachment (disk drive interface)
Advance Technology Extended (motherboard form factor)
Ball Grid Array
Basic Input/Output System
Bus Select (Front Side Bus frequency control signals)
Controller Link
Complementary Metal-Oxide-Semiconductor
Communications
Central Processing Unit (processor)
Customer Reference Board
Direct Current
Dual-Core
Double Data Rate
Double Data Rate SDRAM version 2
Double Data Rate SDRAM version 3
Definition
Definition
11

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