Errata - Intel SL8K2 - Pentium 4 3.20EGHz 800MHz 1MB Socket 478 CPU Specification

Processor on 90 nm process
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Errata

Errata
R1.
Transaction Is Not Retried after BINIT#
Problem:
If the first transaction of a locked sequence receives a HITM# and DEFER# during the snoop
phase it should be retried and the locked sequence restarted. However, if BINIT# is also asserted
during this transaction, it will not be retried.
Implication: When this erratum occurs, locked transactions will unexpectedly not be retried.
Workaround: None identified.
Status:
For the steppings affected see the Summary Tables of Changes.
R2.
Invalid Opcode 0FFFh Requires a ModRM Byte
Problem:
Some invalid opcodes require a ModRM byte (or other following bytes), while others do not. The
invalid opcode 0FFFh did not require a ModRM byte in previous generation Intel architecture
processors, but does in the Pentium 4 processor.
Implication: The use of an invalid opcode 0FFFh without the ModRM byte may result in a page or limit fault
on the Pentium 4 processor.
Workaround: Use a ModRM byte with invalid 0FFFh opcode.
Status:
For the steppings affected, see the Summary Tables of Changes.
R3.
Processor May Hang Due to Speculative Page Walks to Non-Existent
System Memory
Problem:
A load operation that misses the Data Translation Lookaside Buffer (DTLB) will result in a page-
walk. If the page-walk loads the Page Directory Entry (PDE) from cacheable memory and that
PDE load returns data that points to a valid Page Table Entry (PTE) in uncacheable memory the
processor will access the address referenced by the PTE. If the address referenced does not exist
the processor will hang with no response from system memory.
Implication: Processor may hang due to speculative page walks to non-existent system memory.
Workaround: Page directories and page tables in UC memory space which are marked valid must point to
physical addresses that will return a data response to the processor.
Status:
For the steppings affected, see the Summary Tables of Changes.
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Intel
Pentium
4 Processor on 90 nm Process Specification Update
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