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Feature
Node memory Interleave
ECC
DRAM ECC
ECC Scrub Redirection
4-bit ECC
DCACHE ECC Scrub
CTL
L2 ECC Scrub CTL
Option
Disable
AUTO
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Disable
40ns/80ns/
160ns/320n
s/640ns/1.2
8us/2.56us
Disable
40ns/80ns/
160ns/320n
s/640ns/1.2
8us/2.56us
Description
Interleave memory
blocks across
processor nodes BIOS
will AUTO detect capa-
bility of Memory Sys-
tem.
Note: This cannot be
enabled if ACPI
SRAT table is also
enabled. Changing one
value will also toggle
the other.
ECC check/correct
mode. This enables
function for all blocks
within the
core and North Bridge.
If all memory in the
system supports ECC,
enabling this will scrub
DRAM and enable the
system requests to
DRAM to be checked
and/or corrected.
Enables ECC Scrubber
to correct errors
detected in DRAM dur-
ing normal CPU
requests.
Enables 4-bit ECC
mode on Nodes with
ECC capable dims.
Sets the rate of back-
ground scrubbing for
DCACHE lines.
Sets the rate of back-
ground scrubbing for
L2 cache lines.
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