Digital Input / Output; Counters - Measurement Computing PCI-2513 User Manual

PCI-2513 User's Guide
Note 2: Noise reflects 10,000 samples at 1 MHz, typical, differential short, using CA-68-3S cable.

Digital input / output

Number of I/O
Ports
Input scanning mode
Configuration
Input protection
Input high
Input low
Output high
Output low
Output current
Digital input pacing
Digital output pacing
Digital input trigger sources and modes
Digital output trigger sources
Data transfer
Sampling/update rate
Pattern generation output

Counters

Counter inputs can be scanned based on an internal programmable timer or an external clock source.
Channels
Resolution
Input frequency
Input signal range
Input characteristics
Trigger level
Minimum pulse width
De bounce times
Time-base accuracy
Counter read pacer
Trigger sources and modes
Programmable mode
Counter mode options
Table 3. Digital input/output specifications
24
Three banks of eight.
Each port is programmable as input or output
Asynchronous, under program control at any time relative to input scanning
10 kΩ pull-up to +5 V, 20 pf to analog common
±15 kV ESD clamp diodes
+2.0 V to +5.0 V
0 to 0.8 V
>2.0 V
<0.8 V
Output 12 mA per pin, 200 mA total continuous
Onboard clock, external input scan clock (XAPCR)
Four programmable sources:
 Onboard output scan clock, independent of input scan clock
 Onboard input scan clock
 External output scan clock (XDPCR), independent of external input scan
clock (XAPCR)
 External input scan clock (XAPCR)
Refer to Table 7
Start of input scan
DMA
12 MHz maximum
Two of the 8-bit ports can be configured for 16-bit pattern generation. The
pattern can also be updated synchronously with an acquisition at up to 12 MHz.
Table 4. Counter specifications
Four independent
32 bits
20 MHz maximum
–5 V to 10 V
10 k pull-up, ±15 kV ESD protection
TTL
25 ns high, 25 ns low
16 selections from 500 ns to 25.5 ms, positive or negative edge sensitive, glitch
detect mode or debounce mode
30 ppm (0 °C to 50 °C)
Onboard input scan clock, external input scan clock (XAPCR)
Refer to Table 7
Counter
Totalize, clear on read, rollover, stop at all Fs, 16- or 32-bit, any other channel
can gate the counter
37
Specifications