Dip Switch Read Circuit - Epson LQ-1050 Technical Manual

REV.-A
Normal
Lower limit

2.3.5.4 DIP Switch Read Circuit

DIP switch settings are read using analog ports AN2 through 7 after the power is applied or the INIT
input initializes the CPU. Figure 2-46 shows the circuit diagram.
V
A R
CPU
( 7B)
AN
AN
AN
AN
AN
AN
Table 2-16. Relationship Between +35V Line and AN1
4.75V
Fig. 2-46. DIP Switch Read Circuit
35
31.7
m m
PANEL
2-44
3.9
3.6
ANKO
I
A NK2