Figure 49. Output Voltage Timing; Table 52. Output Voltage Timing - Intel S1200BTS Specification

Intel® Server Board S1200BT TPS

The output voltages must rise from 10% to within regulation limits (T
to 70 ms, except for 5 VSB, in which case it is allowed to rise from 1.0 ms to 25 ms.

The +3.3 V, +5 V, and +12 V output voltages should start to rise approximately at the
same time.

All outputs must rise monotonically.

The +5 V output must be greater than the +3.3 V output during any point of the
voltage rise.

The +5 V output must never be greater than the +3.3 V output by more than 2.25 V.

Each output voltage should reach regulation within 50 ms (T
the power supply is turned on.

Each output voltage should fall out of regulation within 400 msec (T
when the power supply is turned off.
Figure 49 and Figure 50 shows the timing requirements for the power supply being turned on
and off via the AC input with PSON held low and the PSON signal with the AC input applied.
Item
T Output voltage rise time from each main output.
vout_rise
T All main outputs must be within regulation of each
vout_on
other within this time.
T All main outputs must leave regulation within this
vout_off
time.
Note:
1. The 5 VSB output voltage rise time should be from 1.0 ms to 25.0 ms.
Revision 1.0

Table 52. Output Voltage Timing

Description

Figure 49. Output Voltage Timing

Intel order number G13326-003
Design and Environmental Specifications
vout_rise
) of each other when
vout_on
vout_off
Minimum Maximum
5.01 701
50
700
) within 5 ms
) of each other
Units
Msec
Msec
Msec
115