Sata Connector - HP Compaq d330 DT Technical Reference Manual

SATA Bus Master Control Registers
The SATA interface can perform PCI bus master operations using the registers listed in Table 5-2.
These registers occupy 16 bytes of variable I/O space set by software and indicated by PCI
configuration register 20h in the previous table. As indicated, these registers are virtually a copy
of those used by EIDE operations discussed in the EIDE section.
Table 5-5. IDE Bus Master Control Registers
I/O Addr. Size
Offset (Bytes)
00h 1
02h 1
04h 4
08h 1
0Ah 2
0Ch 4
NOTE:
Unspecified gaps are reserved, will return indeterminate data, and should not be written to.

5.2.2.2 SATA CONNECTOR

The 7-pin SATA connector is shown in the figure below.
Figure 5-2. 7-Pin SATA Connector (on system board).
Table 5-6. 7-Pin SATA Connector Pinout
Pin Description
1 Ground
2 TX positive
3 TX negative
4 Ground
5 RX negative
Table 5-5.
IDE Bus Master Control Registers
Register
Bus Master IDE Command (Primary)
Bus Master IDE Status (Primary)
Bus Master IDE Descriptor Pointer (Pri.)
Bus Master IDE Command (Secondary)
Bus Master IDE Status (Secondary)
Bus Master IDE Descriptor Pointer (Sec.)
Pin 1
7-Pin SATA Connector Pinout
Pin
6
7
8
9
--
hp compaq d330 and d530 Series of Personal Computers
First Edition – June 2003
Default
Value
00h
00h
0000 0000h
00h
00h
0000 0000h
Pin 7
Table 5-6.
Description
RX positive
Ground
Holding clip
Holding clip
--
Featuring the Intel Pentium 4 Processor
Technical Reference Guide
5-5