Diskette Drive Programming - HP Compaq d330 DT Technical Reference Manual

5.3.1 DISKETTE DRIVE PROGRAMMING

Programming the diskette drive interface consists of configuration, which occurs typically during
POST, and control, which occurs at runtime.
5.3.1.1 Diskette Drive Interface Configuration
The diskette drive controller must be configured for a specific address and also must be enabled
before it can be used. Address selection and enabling of the diskette drive interface are affected by
firmware through the PnP configuration registers of the 47B387 I/O controller during POST.
The configuration registers are accessed through I/O registers 2Eh (index) and 2Fh (data) after the
configuration phase has been activated by writing 55h to I/O port 2Eh. The diskette drive I/F is
initiated by firmware selecting logical device 0 of the 47B387 using the following sequence:
1. Write 07h to I/O register 2Eh.
2. Write 00h to I/O register 2Fh (this selects the diskette drive I/F).
3. Write 30h to I/O register 2Eh.
4. Write 01h to I/O register 2Fh (this activates the interface).
Writing AAh to 2Eh deactivates the configuration phase. The diskette drive I/F configuration
registers are listed in the following table:
Table 5-7. Diskette Drive Controller Configuration Registers
Diskette Drive Interface Configuration Registers
Index
Address Function
30h Activate
60-61h Base Address
70h Interrupt Select
74h DMA Channel Select
F0h DD Mode
F1h DD Option
F2h DD Type
F4h DD 0
F5h DD 1
For detailed configuration register information refer to the SMSC data sheet for the LPC47B387
I/O component.
5.3.1.2 Diskette Drive Interface Control
The BIOS function INT 13 provides basic control of the diskette drive interface. The diskette
drive interface can be controlled by software through the LPC47B387's I/O-mapped registers
listed in Table 5-5. The diskette drive controller of the LPC47B387 operates in the PC/AT mode
in these systems.
Table 5-7.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
hp compaq d330 and d530 Series of Personal Computers
Featuring the Intel Pentium 4 Processor
First Edition – June 2003
Technical Reference Guide
Reset
Value
01h
03F0h
06h
02h
02h
00h
FFh
00h
00h
5-7