AN3759
Optionally, put in hardware Resistor-Capacitor (RC) circuitry to force the JTAG_RST# signal low for at least 5.00 msec.
For example:
1.
Use a MEC1721/MEC1723 EVB with external power supply which shows the rise time less than 100µs.
2.
RC = 100K ohms resistor pullup to VTR and 1µF capacitor.
3.
The rising timing of VTR related to the JTAG_RST# signal is shown in
reverse of the rising time.
Note:
The RC values need to be changed in order to compensate for the power supply time to ensure a 5.00
msec reset pulse, measured from VTR = 3.3V to JTAG_RST# = 0.8V.
FIGURE 3-4:
VTR VS. JTAG RISING TIME
DS00003759B-page 28
Figure
3-4; the falling time should be a
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