Microchip Technology PIC16C63A Operator's Manual
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Microchip Technology PIC16C63A Operator's Manual

Microchip Technology PIC16C63A Operator's Manual

8-bit cmos microcontrollers with a/d converter
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8-Bit CMOS Microcontrollers with A/D Converter
Devices included in this data sheet:
• PIC16C63A
• PIC16C73B
• PIC16C65B
• PIC16C74B
PIC16CXX Microcontroller Core Features:
• High performance RISC CPU
• Only 35 single word instructions to learn
• All single cycle instructions except for program
branches which are two cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• 4 K x 14 words of Program Memory,
192 x 8 bytes of Data Memory (RAM)
• Interrupt capability
• Eight-level deep hardware stack
• Direct, indirect and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up
Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Programmable code protection
• Power-saving SLEEP mode
• Selectable oscillator options
• Low power, high speed CMOS EPROM
technology
• Wide operating voltage range: 2.5V to 5.5V
• High Sink/Source Current 25/25 mA
• Commercial, Industrial and Automotive
temperature ranges
• Low power consumption:
- < 5 mA @ 5V, 4 MHz
- 23 µA typical @ 3V, 32 kHz
- < 1.2 µA typical standby current
I/O
A/D
Devices
Pins
Chan.
PIC16C63A
22
PIC16C65B
33
PIC16C73B
22
PIC16C74B
33
 2000 Microchip Technology Inc.
PIC16C63A/65B/73B/74B
PSP
Interrupts
-
No
10
-
Yes
11
5
No
11
8
Yes
12
PIC16C7X Peripheral Features:
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler
can be incremented during SLEEP via external
crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
• Capture, Compare, PWM modules
- Capture is 16-bit, max. resolution is 200 ns
- Compare is 16-bit, max. resolution is 200 ns
- PWM max. resolution is 10-bit
• 8-bit multichannel Analog-to-Digital converter
• Synchronous Serial Port (SSP) with SPI
2
TM
and I
C
• Universal Synchronous Asynchronous Receiver
Transmitter (USART/SCI)
• Parallel Slave Port (PSP), 8-bits wide with
external RD, WR and CS controls
• Brown-out detection circuitry for Brown-out Reset
(BOR)
Pin Diagram:
PDIP, Windowed CERDIP
MCLR/V
PP
1
RA0/AN0
2
RA1/AN1
3
RA2/AN2
4
RA3/AN3/V
5
REF
RA4/T0CKI
6
RA5/SS/AN4
7
RE0/RD/AN5
8
RE1/WR/AN6
9
RE2/CS/AN7
10
V
11
DD
V
12
SS
OSC1/CLKIN
13
OSC2/CLKOUT
14
RC0/T1OSO/T1CKI
15
RC1/T1OSI/CCP2
16
RC2/CCP1
17
RC3/SCK/SCL
18
RD0/PSP0
19
RD1/PSP1
20
TM
RB7
40
RB6
39
RB5
38
RB4
37
RB3
36
RB2
35
RB1
34
RB0/INT
33
V
32
DD
V
31
SS
RD7/PSP7
30
RD6/PSP6
29
RD5/PSP5
28
RD4/PSP4
27
RC7/RX/DT
26
RC6/TX/CK
25
RC5/SDO
24
RC4/SDI/SDA
23
RD3/PSP3
22
RD2/PSP2
21
DS30605C-page 1

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Summary of Contents for Microchip Technology PIC16C63A

  • Page 1 - 23 µA typical @ 3V, 32 kHz RC6/TX/CK RC1/T1OSI/CCP2 RC5/SDO RC2/CCP1 - < 1.2 µA typical standby current RC4/SDI/SDA RC3/SCK/SCL RD3/PSP3 RD0/PSP0 RD2/PSP2 RD1/PSP1 Devices Interrupts Pins Chan. PIC16C63A PIC16C65B PIC16C73B PIC16C74B  2000 Microchip Technology Inc. DS30605C-page 1...
  • Page 2 Brown-out Reset Interrupt Sources Packages 28-pin SDIP, SOIC, 40-pin PDIP; 28-pin SDIP, SOIC, 40-pin PDIP; SSOP, 44-pin PLCC, SSOP, 44-pin PLCC, Windowed CERDIP MQFP, TQFP, Windowed CERDIP MQFP, TQFP, Windowed CERDIP Windowed CERDIP  2000 Microchip Technology Inc. DS30605C-page 2...

  • Page 3: Table Of Contents

    18.0 Packaging Information................................153 Appendix A: Revision History ................................ 165 Appendix B: Device Differences..............................165 Device Migrations - PIC16C63/65A/73A/74A → PIC16C63A/65B/73B/74B ............. 166 Appendix C: Appendix D: Migration from Baseline to Mid-Range Devices......................168 On-Line Support....................................175 Reader Response ....................................176 Product Identification System ................................
  • Page 4 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 4...

  • Page 5: General Description

    Low cost, low power, high performance, used to achieve a very high performance. ease of use and I/O flexibility make the PIC16C63A/ The PIC16C63A/73B devices have 22 I/O pins. The 65B/73B/74B devices very versatile, even in areas PIC16C65B/74B devices have 33 I/O pins.
  • Page 6 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 6...

  • Page 7: Pic16C63A/65B/73B/74B Device Varieties

    PIC16C63A/65B/73B/74B lized. The devices are identical to the OTP devices but Product Identification System section at the end of this with all EPROM locations and configuration options data sheet.
  • Page 8 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 8...

  • Page 9: Architectural Overview

    This symmetrical nature and lack of ‘special optimal situations’ make programming with the PIC16CXX simple yet efficient. In addition, the learning curve is reduced significantly.  2000 Microchip Technology Inc. DS30605C-page 9...
  • Page 10 CCP2 Serial Port Note 1: Higher order bits are from the STATUS register. 2: A/D is not available on the PIC16C63A/65B. 3: PSP and Ports D and E are not available on PIC16C63A/73B.  2000 Microchip Technology Inc. DS30605C-page 10...
  • Page 11 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 3: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 4: A/D module is not available in the PIC16C63A.  2000 Microchip Technology Inc.
  • Page 12 Slave Port mode (for interfacing to a microprocessor bus). 4: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 5: A/D is not available on the PIC16C65B.  2000 Microchip Technology Inc. DS30605C-page 12...
  • Page 13 Slave Port mode (for interfacing to a microprocessor bus). 4: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 5: A/D is not available on the PIC16C65B.  2000 Microchip Technology Inc. DS30605C-page 13...
  • Page 14 All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction is “flushed” from the pipeline, while the new instruction is being fetched and then executed.  2000 Microchip Technology Inc. DS30605C-page 14...

  • Page 15: Memory Organization

    Program Memory Organization which contain the General Purpose Registers (GPR) and the Special Function Registers (SFR). Bits RP1 The PIC16C63A/65B/73B/74B has a 13-bit program and RP0 are the bank select bits. counter capable of addressing an 8K x 14 program memory space.
  • Page 16 ’0’. Note 1: Not a physical register. 2: These registers are not implemented on the PIC16C63A/73B, read as '0'. 3: These registers are not implemented on the PIC16C63A/65B, read as '0'.  2000 Microchip Technology Inc.
  • Page 17 3: Other (non power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset. 4: These registers can be addressed from either bank. 5: PORTD, PORTE and the parallel slave port are not implemented on the PIC16C63A/73B; always maintain these bits and registers clear.
  • Page 18 3: Other (non power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset. 4: These registers can be addressed from either bank. 5: PORTD, PORTE and the parallel slave port are not implemented on the PIC16C63A/73B; always maintain these bits and registers clear.
  • Page 19 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 19...
  • Page 20 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 20...
  • Page 21 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 21...
  • Page 22 1 = Enables the TMR1 overflow interrupt 0 = Disables the TMR1 overflow interrupt Note 1: PIC16C63A/73B devices do not have a parallel slave port implemented; always maintain this bit clear. 2: PIC16C63A/65B devices do not have an A/D implemented; always maintain this bit clear.
  • Page 23 1 = TMR1 register overflowed (must be cleared in software) 0 = TMR1 register did not overflow Note 1: PIC16C63A/73B devices do not have a parallel slave port implemented. This bit loca- tion is reserved on these devices. 2: PIC16C63A/65B devices do not have an A/D implemented. This bit location is reserved on these devices.
  • Page 24 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 24...
  • Page 25 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 25...
  • Page 26 ;in page 0 (000h-7FFh) after the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on).  2000 Microchip Technology Inc. DS30605C-page 26...
  • Page 27 17Fh 1FFh Bank 0 Bank 1 Bank 2 Bank 3 Note 1: For register file map detail, see Figure 4-2. 2: Shaded portions are not implemented; maintain the IRP and RP1 bits clear.  2000 Microchip Technology Inc. DS30605C-page 27...
  • Page 28 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 28...

  • Page 29: I/O Ports

    ; Set RA<3:0> as inputs ; RA<5:4> as outputs RD Port ; TRISA<7:6> are always ; read as ’0’. TMR0 Clock Input Note 1: I/O pins have protection diodes to V and V  2000 Microchip Technology Inc. DS30605C-page 29...
  • Page 30 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by PORTA. Note 1: The A/D is not implemented on the PIC16C63A/65B. Pins will operate as digital I/O only. ADCON1 is not implemented;...
  • Page 31 Change Interrupt with flag bit RBIF (INTCON<0>). Note 1: I/O pins have diode protection to V and V 2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).  2000 Microchip Technology Inc. DS30605C-page 31...
  • Page 32 TRISB PORTB Data Direction register 1111 1111 1111 1111 OPTION_REG RBPU INTEDG T0CS T0SE 1111 1111 1111 1111 Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.  2000 Microchip Technology Inc. DS30605C-page 32...
  • Page 33 Bit 3 Bit 2 Bit 1 Bit 0 POR, all other RESETS PORTC xxxx xxxx uuuu uuuu TRISC PORTC Data Direction register 1111 1111 1111 1111 Legend: x = unknown, u = unchanged  2000 Microchip Technology Inc. DS30605C-page 33...
  • Page 34 PORTD and TRISD Registers FIGURE 5-6: PORTD BLOCK DIAGRAM Data Note: The PIC16C63A and PIC16C73B do not provide PORTD. The PORTD and TRISD I/O pin registers are not implemented. Port PORTD is an 8-bit port with Schmitt Trigger input buff- Data Latch ers.
  • Page 35 PIC16C63A/65B/73B/74B PORTE and TRISE Register FIGURE 5-7: PORTE BLOCK DIAGRAM Data Note 1: The PIC16C63A and PIC16C73B do not provide PORTE. The PORTE and TRISE I/O pin registers are not implemented. Port 2: The PIC16C63A/65B does not provide an Data Latch A/D module.
  • Page 36 ADCON1 — — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000 Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.  2000 Microchip Technology Inc. DS30605C-page 36...
  • Page 37 When not in PSP mode, the IBF and OBF bits are held clear. However, if flag bit IBOV was previously set, it Note: The PIC16C63A and PIC16C73B do not must be cleared in firmware. provide a parallel slave port. The PORTD,...
  • Page 38 — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000 Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Parallel Slave Port.  2000 Microchip Technology Inc. DS30605C-page 38...

  • Page 39: Timer0 Module

    T0SE T0CS Set Flag bit T0IF on Overflow PRESCALER 8-bit Prescaler Watchdog Timer 8 - to - 1MUX PS2:PS0 WDT Enable bit M U X Time-out Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>).  2000 Microchip Technology Inc. DS30605C-page 39...
  • Page 40 To avoid an unintended device RESET, the instruction sequence shown in the PICmicro™ Mid-Range MCU Family Reference Manual (DS33023, Section 11.6) must be executed when changing the prescaler assign- ment from Timer0 to the WDT. This sequence must be followed even if the WDT is disabled.  2000 Microchip Technology Inc. DS30605C-page 40...
  • Page 41 0000 000x 0000 000u OPTION_REG RBPU INTEDG T0CS T0SE 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by Timer0.  2000 Microchip Technology Inc. DS30605C-page 41...
  • Page 42 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 42...

  • Page 43: Timer1 Module

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 43...
  • Page 44 T1CKPS1:T1CKPS0 TMR1CS Note 1: When the T1OSCEN bit is cleared, the inverter is turned off. This eliminates power drain. 2: For the PIC16C65B/73B/74B, the Schmitt Trigger is not implemented in External Clock mode.  2000 Microchip Technology Inc. DS30605C-page 44...
  • Page 45 Brown-out Reset, which shuts off the timer and leaves a 1:1 prescale. In all other resets, the register is unaffected. Timer1 Prescaler The prescaler counter is cleared on writes to the TMR1H or TMR1L registers.  2000 Microchip Technology Inc. DS30605C-page 45...
  • Page 46 = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by the Timer1 module. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.

  • Page 47: Timer2 Module

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 47...
  • Page 48 = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by the Timer2 module. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.

  • Page 49: Capture/Compare/Pwm Modules

    The compare should be configured for the special event trigger, which clears TMR1. Compare Compare The compare(s) should be configured for the special event trigger, which clears TMR1. The PWMs will have the same frequency and update rate (TMR2 interrupt). Capture None. Compare None.  2000 Microchip Technology Inc. DS30605C-page 49...
  • Page 50 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 50...
  • Page 51 NEW_CAPT_PS ; Load the W reg with RC2/CCP1 ; the new prescaler CCPR1H CCPR1L ; move value and CCP ON MOVWF CCP1CON ; Load CCP1CON with this Capture ; value Enable Edge Detect TMR1H TMR1L CCP1CON<3:0> Q’s  2000 Microchip Technology Inc. DS30605C-page 51...
  • Page 52 CCP1 pin is not affected. The CCPIF bit is set, causing latch D.C. a CCP interrupt (if enabled). Note 1: 8-bit timer is concatenated with 2-bit internal Q clock, or 2 bits of the prescale, to create 10-bit time-base.  2000 Microchip Technology Inc. DS30605C-page 52...
  • Page 53 EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz PWM Frequency 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz Timer Prescaler (1, 4, 16) PR2 Value 0xFF 0xFF 0xFF 0x3F 0x1F 0x17 Maximum Resolution (bits)  2000 Microchip Technology Inc. DS30605C-page 53...
  • Page 54 = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by Capture and Timer1. Note 1: The PSP is not implemented on the PIC16C63A/73B; always maintain these bits clear. 2: The A/D is not implemented on the PIC16C63A/65B; always maintain these bits clear.

  • Page 55: Synchronous Serial Port (Ssp) Module

    0100), the SPI module will reset if the SS pin is set to V 2: If the SPI is used in Slave mode with CKE = '1', then the SS pin control must be enabled.  2000 Microchip Technology Inc. DS30605C-page 55...
  • Page 56 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 56...
  • Page 57 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 57...
  • Page 58 SPI MODE TIMING (SLAVE MODE WITH CKE = 0) SS (optional) SCK (CKP = 0) SCK (CKP = 1) bit7 bit6 bit5 bit3 bit2 bit1 bit0 bit4 SDI (SMP = 0) bit7 bit0 SSPIF  2000 Microchip Technology Inc. DS30605C-page 58...
  • Page 59 Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the SSP in SPI mode. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.
  • Page 60 The SCL clock input must have minimum high and low times for proper operation. The high and low times of the I C specification, as well as the requirement of the SSP module, is shown in timing parameter #100 and parameter #101.  2000 Microchip Technology Inc. DS30605C-page 60...
  • Page 61 Transfer is Received → SSPSR SSPBUF (SSP Interrupt occurs Pulse if enabled) SSPOV Yes, SSPOV is set Note: Shaded cells show the conditions where the user software did not properly clear the overflow condition.  2000 Microchip Technology Inc. DS30605C-page 61...
  • Page 62 A7 A6 A5 A4 A3 A2 A1 SSPIF (PIR1<3>) Cleared in software Bus Master terminates transfer BF (SSPSTAT<0>) SSPBUF register is read SSPOV (SSPCON<6>) Bit SSPOV is set because the SSPBUF register is still full ACK is not sent  2000 Microchip Technology Inc. DS30605C-page 62...
  • Page 63 BF (SSPSTAT<0>) From SSP Interrupt SSPBUF is written in software Service Routine CKP (SSPCON<4>) Set bit after writing to SSPBUF (the SSPBUF must be written to before the CKP bit can be set)  2000 Microchip Technology Inc. DS30605C-page 63...
  • Page 64 Shaded cells are not used by SSP module in I C mode. Note 1: PSPIF and PSPIE are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: ADIF and ADIE are reserved on the PIC16C63A/65B; always maintain these bits clear.

  • Page 65: Addressable Universal Synchronous Asynchronous Receiver Transmitter (Usart)

    R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 65...
  • Page 66 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 66...
  • Page 67 OERR RX9D 0000 -00x 0000 -00x SPBRG Baud Rate Generator register 0000 0000 0000 0000 Legend: x = unknown, - = unimplemented, read as '0'. Shaded cells are not used by the BRG.  2000 Microchip Technology Inc. DS30605C-page 67...
  • Page 68 USART TRANSMIT BLOCK DIAGRAM Data Bus TXIF TXREG register TXIE Pin Buffer • • • and Control TSR register RC6/TX/CK pin Interrupt TXEN Baud Rate CLK TRMT SPEN SPBRG Baud Rate Generator TX9D  2000 Microchip Technology Inc. DS30605C-page 68...
  • Page 69 Legend: u = unchanged, x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
  • Page 70 CREN SPBRG RSR Register ÷ 64 ÷ 16 Baud Rate Generator • • • STOP START RC7/RX/DT Pin Buffer Data and Control Recovery RX9D SPEN RCREG Register FIFO RCIF Interrupt Data Bus RCIE  2000 Microchip Technology Inc. DS30605C-page 70...
  • Page 71 Shaded cells are not used for asynchronous reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C73/73A/76; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.  2000 Microchip Technology Inc.
  • Page 72 Normally, when transmission is first started, the TSR register is empty, so a transfer to the TXREG register will result in an immediate transfer to TSR resulting in an empty TXREG. Back-to-back transfers are possible.  2000 Microchip Technology Inc. DS30605C-page 72...
  • Page 73 Shaded cells are not used for synchronous master transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
  • Page 74 RCREG register will load bit RX9D with a new value, therefore it is essential for the user to read the RCSTA register before reading RCREG in order not to lose the old RX9D information.  2000 Microchip Technology Inc. DS30605C-page 74...
  • Page 75 Shaded cells are not used for synchronous master reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
  • Page 76 If 9-bit transmission is desired, set bit TX9. Enable the transmission by setting enable bit TXEN. If 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D. Start transmission by loading data to the TXREG register.  2000 Microchip Technology Inc. DS30605C-page 76...
  • Page 77 Shaded cells are not used for synchronous slave transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
  • Page 78 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 78...

  • Page 79: Analog-To-Digital Converter (A/D) Module

    SLEEP, the A/D conversion clock must be derived from the A/D’s internal RC oscillator. Note: The PIC16C63A and PIC16C65B do not include A/D modules. ADCON0, ADCON1 The A/D module has three registers. These registers and ADRES registers are not imple- are: mented.
  • Page 80 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown  2000 Microchip Technology Inc. DS30605C-page 80...
  • Page 81 A/D BLOCK DIAGRAM CHS2:CHS0 RE2/AN7 RE1/AN6 RE0/AN5 RA5/AN4 (Input Voltage) RA3/AN3/V RA2/AN2 Converter RA1/AN1 RA0/AN0 000 or 010 or 100 or (Reference 001 or Voltage) 011 or PCFG2:PCFG0 Note 1: Not available on PIC16C73B.  2000 Microchip Technology Inc. DS30605C-page 81...
  • Page 82 EQUATION 12-1: ACQUISITION TIME Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient COFF = 5 µS = - (51.2 pF)(1 kΩ + R ) In(1/511) = (Temp -25°C)(0.05 µS/°C) COFF  2000 Microchip Technology Inc. DS30605C-page 82...
  • Page 83 A/D module, but will still reset the Timer1 counter. this 2 T wait, an acquisition is automatically started on the selected channel. The GO/DONE bit can then be set to start another conversion.  2000 Microchip Technology Inc. DS30605C-page 83...
  • Page 84 Legend: x = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used for A/D conversion. Note 1: Bits PSPIE and PSPIF are reserved on the PIC6C63A/73B; always maintain these bits clear.  2000 Microchip Technology Inc. DS30605C-page 84...

  • Page 85: Special Features Of The Cpu

    Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of PWRTE. 2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.  2000 Microchip Technology Inc. DS30605C-page 85...
  • Page 86 OSC1/ CLKIN pin (Figure 13-2). See the PICmicro™ Mid- OSC1 Clock from Range MCU Reference Manual (DS33023) for details ext. system PIC16CXX on building an external oscillator. Open OSC2  2000 Microchip Technology Inc. DS30605C-page 86...
  • Page 87 ± 50 PPM 8 MHz EPSON CA-301 8.000M-C ± 30 PPM Recommended Values: R = 3 kW to 100 kW 20 MHz EPSON CA-301 20.000M-C ± 30 PPM = 20 pf to 30 pF  2000 Microchip Technology Inc. DS30605C-page 87...
  • Page 88 Chip Reset 10-bit Ripple Counter OSC1 (Note 1) PWRT On-chip 10-bit Ripple Counter RC OSC Enable PWRT Enable OST Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.  2000 Microchip Technology Inc. DS30605C-page 88...
  • Page 89 The Power-on Reset Status bit, POR, is cleared on a POR and unaffected otherwise. The user must set this bit following a POR and check it on subsequent RESETS to see if it has been cleared.  2000 Microchip Technology Inc. DS30605C-page 89...
  • Page 90 Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). REGISTER 13-2: STATUS REGISTER REGISTER 13-3: PCON REGISTER — — — — — —  2000 Microchip Technology Inc. DS30605C-page 90...
  • Page 91 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 13-5 for RESET value for specific condition.  2000 Microchip Technology Inc. DS30605C-page 91...
  • Page 92 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 13-5 for RESET value for specific condition.  2000 Microchip Technology Inc. DS30605C-page 92...
  • Page 93 The latency is the same for one or two cycle instructions. Individual interrupt flag bits are set, regardless of the status of their corresponding mask bit, PEIE bit, or the GIE bit.  2000 Microchip Technology Inc. DS30605C-page 93...
  • Page 94 See Section 13.8 for details on SLEEP mode. 13.5.2 TMR0 INTERRUPT An overflow (FFh → 00h) in the TMR0 register will set flag bit T0IF (INTCON<2>). The interrupt can be enabled/disabled by setting/clearing enable bit T0IE (INTCON<5>) (see Section 6.0).  2000 Microchip Technology Inc. DS30605C-page 94...
  • Page 95 (Watchdog from SLEEP mode. Timer Wake-up). The TO bit in the STATUS register will be cleared upon The WDT can be permanently disabled by clearing a WDT time-out. configuration bit WDTE (Section 13.1).  2000 Microchip Technology Inc. DS30605C-page 95...
  • Page 96 Config. bits – WDTE FOSC1 FOSC0 BODEN PWRTE OPTION_REG RBPU INTEDG T0CS T0SE Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Register 13-1 for operation of these bits.  2000 Microchip Technology Inc. DS30605C-page 96...
  • Page 97 SSP transmit or receive in Slave mode (SPI/I CCP Capture mode interrupt. Parallel Slave port read or write (PIC16C65B/74B only). A/D conversion (when A/D clock source is RC). USART TX or RX (Synchronous Slave mode).  2000 Microchip Technology Inc. DS30605C-page 97...
  • Page 98 This Data I/O also allows the most recent firmware or a custom firm- ware to be programmed. To Normal Connections  2000 Microchip Technology Inc. DS30605C-page 98...

  • Page 99: Instruction Set Summary

    CALL and GOTO instructions only Contents → Assigned to OPCODE k (literal) < > Register bit field k = 11-bit immediate value ∈ In the set of talics User defined term (font is courier)  2000 Microchip Technology Inc. DS30605C-page 99...
  • Page 100 3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP . Note: Additional information on the mid-range instruction set is available in the PICmicro Mid-Range MCU Family Reference Manual (DS33023).  2000 Microchip Technology Inc. DS30605C-page 100...
  • Page 101 Status Affected: None Description: The contents of W register are AND’ed with the eight bit literal 'k'. Description: Bit 'b' in register 'f' is set. The result is placed in the W register.  2000 Microchip Technology Inc. DS30605C-page 101...
  • Page 102 Timer. It also resets the prescaler loaded into PC bits <10:0>. The upper of the WDT. Status bits TO and PD bits of the PC are loaded from are set. PCLATH. CALL is a two-cycle instruction.  2000 Microchip Technology Inc. DS30605C-page 102...
  • Page 103 If the result is 0, then a NOP executed. If the result is 0, a NOP is is executed instead making it a 2 T executed instead making it a 2 T instruction. instruction  2000 Microchip Technology Inc. DS30605C-page 103...
  • Page 104 If d = 0, destination is W register. If d = 1, the destination is file register f itself. d = 1 is useful to test a file register since status flag Z is affected.  2000 Microchip Technology Inc. DS30605C-page 104...
  • Page 105 The power-down status bit, PD is cleared. Time-out status bit, TO is set. Watchdog Timer and its prescaler are cleared. The processor is put into SLEEP mode with the oscillator stopped. See Section 13.8 for more details.  2000 Microchip Technology Inc. DS30605C-page 105...
  • Page 106 The upper and lower nibbles of regis- ter 'f' are exchanged. If 'd' is 0, the result is placed in W register. If 'd' is 1, the result is placed in register 'f'.  2000 Microchip Technology Inc. DS30605C-page 106...

  • Page 107: Development Support

    For easier source level debugging, the compilers pro- • Customizable toolbar and key mapping vide symbol information that is compatible with the • A status bar MPLAB IDE memory display. • On-line help  2000 Microchip Technology Inc. DS30605C-page 107...
  • Page 108 • Allows libraries to be created and modules to be The ICEPIC low cost, in-circuit emulator is a solution added, listed, replaced, deleted or extracted. for the Microchip Technology PIC16C5X, PIC16C6X, PIC16C7X and PIC16CXXX families of 8-bit One- 15.5 MPLAB SIM Software Simulator Time-Programmable (OTP) microcontrollers.
  • Page 109 PICmicro devices with up to 40 pins. Larger pin module and a keypad. count devices, such PIC16C92X PIC17C76X, may be supported with an adapter socket. The PICSTART Plus development programmer is CE compliant.  2000 Microchip Technology Inc. DS30605C-page 109...
  • Page 110 LCD signals on a PC. A simple serial codes, a decoder to decode transmissions and a pro- interface allows the user to construct a hardware gramming interface to program test transmitters. demultiplexer for the LCD signals.  2000 Microchip Technology Inc. DS30605C-page 110...
  • Page 111 á á á á á á á á á á á á á á á á á á á á á á á á á á á á á á á á á  2000 Microchip Technology Inc. DS30605C-page 111...
  • Page 112 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 112...

  • Page 113: Electrical Characteristics

    V 3: PORTD and PORTE not available on the PIC16C63A/73B. † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied.
  • Page 114 = (12.0 MHz/V) (V - 2.5 V) + 4 MHz DDAPPMIN ® Note 1: V is the minimum voltage of the PICmicro device in the application. DDAPPMIN Note 2: F has a maximum frequency of 10MHz.  2000 Microchip Technology Inc. DS30605C-page 114...
  • Page 115 PIC16C63A/65B/73B/74B FIGURE 16-3: PIC16C63A/65B/73B/74B VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V PIC16CXXX-04 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 2.0 V 4 MHz Frequency  2000 Microchip Technology Inc. DS30605C-page 115...
  • Page 116 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 116...
  • Page 117 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 117...
  • Page 118 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 118...
  • Page 119 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 119...
  • Page 120 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 120...
  • Page 121 The specified lev- els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin.  2000 Microchip Technology Inc. DS30605C-page 121...
  • Page 122 Uppercase letters and their meanings: Fall Period High Rise Invalid (Hi-impedance) Valid Hi-impedance C only output access High High Bus free C specifications only) Hold Setup DATA input hold STOP condition START condition  2000 Microchip Technology Inc. DS30605C-page 122...
  • Page 123 = 50 pF for all pins except OSC2/CLKOUT but including D and E outputs as ports = 15 pF for OSC2 output Note 1: PORTD and PORTE are not implemented on the PIC16C63A/73B.  2000 Microchip Technology Inc. DS30605C-page 123...
  • Page 124 All devices are tested to operate at “min.” values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the “Max.” cycle time limit is “DC” (no clock) for all devices.  2000 Microchip Technology Inc. DS30605C-page 124...
  • Page 125 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. ††These parameters are asynchronous events not related to any internal clock edge. Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x T  2000 Microchip Technology Inc. DS30605C-page 125...
  • Page 126 — (D005) * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2000 Microchip Technology Inc. DS30605C-page 126...
  • Page 127 — — * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2000 Microchip Technology Inc. DS30605C-page 127...
  • Page 128 PIC16LCXX — * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2000 Microchip Technology Inc. DS30605C-page 128...
  • Page 129 TrdH2dtI RD↑ or CS↑ to data out invalid — * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2000 Microchip Technology Inc. DS30605C-page 129...
  • Page 130 † Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used.  2000 Microchip Technology Inc. DS30605C-page 130...
  • Page 131 † Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used.  2000 Microchip Technology Inc. DS30605C-page 131...
  • Page 132 † Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used.  2000 Microchip Technology Inc. DS30605C-page 132...
  • Page 133 † Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used.  2000 Microchip Technology Inc. DS30605C-page 133...
  • Page 134 100 kHz mode 4000 — — Hold time 400 kHz mode — — * These parameters are characterized but not tested. FIGURE 16-17: C BUS DATA TIMING Note: Refer to Figure 16-4 for load conditions.  2000 Microchip Technology Inc. DS30605C-page 134...
  • Page 135 SDA line T max.+tsu;DAT = 1000 + 250 = 1250 ns (according to the stan- dard mode I C bus specification) before the SCL line is released.  2000 Microchip Technology Inc. DS30605C-page 135...
  • Page 136 — — * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.  2000 Microchip Technology Inc. DS30605C-page 136...
  • Page 137 RA3 pin or the V pin, whichever is selected as a reference input. 3: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.  2000 Microchip Technology Inc. DS30605C-page 137...
  • Page 138 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following T cycle. 2: See Section 12.1 for minimum conditions.  2000 Microchip Technology Inc. DS30605C-page 138...

  • Page 139: Dc And Ac Characteristics Graphs And Tables

    This is for information only and devices are • Min or Minimum represents the mean - 3σ over ensured to operate properly only within the specified the temperature range of -40°C to 85°C. range.  2000 Microchip Technology Inc. DS30605C-page 139...
  • Page 140 @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V (MHz)  2000 Microchip Technology Inc. DS30605C-page 140...
  • Page 141 @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V (kHz)  2000 Microchip Technology Inc. DS30605C-page 141...
  • Page 142 @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V (MHz)  2000 Microchip Technology Inc. DS30605C-page 142...
  • Page 143 FOR VARIOUS RESISTANCES – RC MODE; C = 100 PF Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 3.3 k 5.1 k 10 k 100 k  2000 Microchip Technology Inc. DS30605C-page 143...
  • Page 144 FIGURE 17-10: vs. V OVER TEMPERATURE – TTL INPUT Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (-40°C) Typ (25°C) Min (125°C)  2000 Microchip Technology Inc. DS30605C-page 144...
  • Page 145 OVER TEMPERATURE – SCHMITT TRIGGER INPUT Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (125°C) Typ (25°C) Min (-40°C) Max (125°C) Typ (25°C) Min (-40°C)  2000 Microchip Technology Inc. DS30605C-page 145...
  • Page 146 I AT V = 5.0 V Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (-40°C) Typical (25°C) Min (125°C) (mA)  2000 Microchip Technology Inc. DS30605C-page 146...
  • Page 147 I AT V = 5.0 V Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (125°C) Typ (25°C) Min (-40°C) (-mA)  2000 Microchip Technology Inc. DS30605C-page 147...
  • Page 148 (125°C) – SLEEP MODE, ALL PERIPHERALS DISABLED Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 1,400 1,200 Max (125°C) 1,000 Typ (125°C)  2000 Microchip Technology Inc. DS30605C-page 148...
  • Page 149 FIGURE 17-20: vs. V (-10°C TO +70°C) TIMER Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (-10°C to 70°C) Typical (25°C)  2000 Microchip Technology Inc. DS30605C-page 149...
  • Page 150 WDT PERIOD vs. V OVER TEMPERATURE (-40°C TO +125°C) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Maximum (125°C) Typical (25°C) Minimum (-40°C)  2000 Microchip Technology Inc. DS30605C-page 150...
  • Page 151 AVERAGE WDT PERIOD vs. V OVER TEMPERATURE (-40°C TO +125°C) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 125°C 85°C 25°C -40°C  2000 Microchip Technology Inc. DS30605C-page 151...
  • Page 152 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 152...

  • Page 153: Packaging Information

    Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.  2000 Microchip Technology Inc. DS30605C-page 153...
  • Page 154 XXXXXXXXXXX YYWWNNN 0017HAT 44-Lead TQFP Example XXXXXXXXXX PIC16C74B XXXXXXXXXX -20/PT XXXXXXXXXX YYWWNNN 0017HAT 44-Lead MQFP Example XXXXXXXXXX PIC16C74B XXXXXXXXXX -20/PQ XXXXXXXXXX YYWWNNN 0017SAT 44-Lead PLCC Example XXXXXXXXXX PIC16C74B XXXXXXXXXX -20/L XXXXXXXXXX YYWWNNN 0017SAT  2000 Microchip Technology Inc. DS30605C-page 154...
  • Page 155 * Controlling Parameter § Significant Characteristic Notes: Dimension D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-095 Drawing No. C04-070  2000 Microchip Technology Inc. DS30605C-page 155...
  • Page 156 .385 .425 8.76 9.78 10.80 Window Width .130 .140 .150 3.30 3.56 3.81 Window Length .290 .300 .310 7.37 7.62 7.87 * Controlling Parameter § Significant Characteristic JEDEC Equivalent: MO-058 Drawing No. C04-080  2000 Microchip Technology Inc. DS30605C-page 156...
  • Page 157 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-052  2000 Microchip Technology Inc. DS30605C-page 157...
  • Page 158 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-150 Drawing No. C04-073  2000 Microchip Technology Inc. DS30605C-page 158...
  • Page 159 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-011 Drawing No. C04-016  2000 Microchip Technology Inc. DS30605C-page 159...
  • Page 160 0.41 0.51 0.58 Overall Row Spacing § .610 .660 .710 15.49 16.76 18.03 Window Diameter .340 .350 .360 8.64 8.89 9.14 * Controlling Parameter § Significant Characteristic JEDEC Equivalent: MO-103 Drawing No. C04-014  2000 Microchip Technology Inc. DS30605C-page 160...
  • Page 161 * Controlling Parameter § Significant Characteristic Notes: Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-026 Drawing No. C04-076  2000 Microchip Technology Inc. DS30605C-page 161...
  • Page 162 * Controlling Parameter § Significant Characteristic Notes: Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-022 Drawing No. C04-071  2000 Microchip Technology Inc. DS30605C-page 162...
  • Page 163 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-047 Drawing No. C04-048  2000 Microchip Technology Inc. DS30605C-page 163...
  • Page 164 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 164...

  • Page 165: Appendix A: Revision History

    28-pin PDIP, 28-pin 40-pin PDIP, 40-pin windowed CERDIP, windowed CERDIP, windowed CERDIP, windowed CERDIP, 28-pin SOIC, 28-pin 44-pin TQFP, 44-pin 28-pin SOIC, 28-pin 44-pin TQFP, 44-pin SSOP MQFP, 44-pin PLCC SSOP MQFP, 44-pin PLCC  2000 Microchip Technology Inc. DS30605C-page 165...

  • Page 166: Appendix C: Device Migrations - Pic16C63/65A/73A/74A → Pic16C63A/65B/73B/74B

    H/W - Issues may exist with regard to the application circuits. S/W - Issues may exist with regard to the user program. Prog. - Issues may exist when writing the program to the controller.  2000 Microchip Technology Inc. DS30605C-page 166...
  • Page 167 4: This is the time from when the GO/DONE bit is set, to when the conversion result appears in ADRES. 5: Specification 73A is only required if specifications 71A and 72A are used.  2000 Microchip Technology Inc. DS30605C-page 167...

  • Page 168: Appendix D: Migration From Baseline To Mid-Range Devices

    18. Brown-out protection circuitry has been added. Controlled by configuration word bit BODEN. Brown-out Reset ensures the device is placed in a RESET condition if V dips below a fixed setpoint.  2000 Microchip Technology Inc. DS30605C-page 168...
  • Page 169 RB7:RB4 Port Pins ............. 31 SSP in I C Mode............60 SSP in SPI Mode ............55 Timer0/WDT Prescaler..........39 Timer2 ................. 47 USART Receive............70 USART Transmit ............68 Watchdog Timer ............96  2000 Microchip Technology Inc. DS30605C-page 169...
  • Page 170 PIC16C76 ............16 BCF ................101 PIC16C77 ............16 BSF ................101 ® MPLAB Integrated Development BTFSC ..............102 Environment Software ............107 BTFSS ..............102 CALL ................. 102 CLRF................. 102 CLRW................ 102 CLRWDT..............102  2000 Microchip Technology Inc. DS30605C-page 170...
  • Page 171 RC2/CCP1 ............11, 13 PSPMODE bit ............34, 35, 37 RC3/SCK/SCL ............11, 13 PUSH.................. 26 RC4/SDI/SDA ............11, 13 RC5/SDO .............. 11, 13 RC6/TX/CK ..........11, 13, 65–76 RC7/RX/DT ..........11, 13, 65–76 RD0/PSP0..............13  2000 Microchip Technology Inc. DS30605C-page 171...
  • Page 172 Slave Mode Timing ............. 59 Resetting Timer1 using a CCP Slave Mode Timing Diagram ........58 Trigger Output ............ 45 Slave Select ..............55 Synchronized Counter Mode ......44 SSPCON ..............57 T1CON ............... 43  2000 Microchip Technology Inc. DS30605C-page 172...
  • Page 173 TOUTPS3 bit............... 47 TRISA Register ............. 18, 29 TRISB Register ............. 18, 31 TRISC Register ............. 18, 33 TRISD Register ............. 18, 34 TRISE Register ............18, 35, 36 TXSTA Register ..............65  2000 Microchip Technology Inc. DS30605C-page 173...
  • Page 174 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 174...

  • Page 175: On-Line Support

    PICMASTER, PICSTART, PRO MATE, K , SEEVAL, • Technical Support Section with Frequently Asked MPLAB and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Questions Incorporated in the U.S.A. and other countries. • Design Tips Total Endurance, ICSP, In-Circuit Serial Programming, FilterLab, MXDEV, microID, FlexROM, fuzzyLAB, MPASM, •...

  • Page 176: Reader Response

    5. What deletions from the data sheet could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products?  2000 Microchip Technology Inc. DS30605C-page 176...

  • Page 177: Product Identification System

    Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2000 Microchip Technology Inc. DS30605C-page 177...

  • Page 178: Microchip Technology Inc. Ds30605C

    PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 178...
  • Page 179 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 179...
  • Page 180 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 180...
  • Page 181 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 181...
  • Page 182 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 182...
  • Page 183 PIC16C63A/65B/73B/74B NOTES:  2000 Microchip Technology Inc. DS30605C-page 183...
  • Page 184 Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved.

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