Rabbit RabbitCore RCM3400 User Manual page 70

C-programmable analog core module with 10/100base-t reference design
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Figure A-4 shows a typical timing diagram for the Rabbit 3000 microprocessor external
I/O read and write cycles.
CLK
A[15:0]
/CSx
/IOCSx
/IORD
/BUFEN
D[7:0]
CLK
A[15:0]
/CSx
/IOCSx
/IOWR
/BUFEN
D[7:0]
Figure A-4. External I/O Read and Write Cycles—No Extra Wait States
NOTE: /IOCSx can be programmed to be active low (default) or active high.
64
Tw
T1
valid
T adr
T CSx
T IOCSx
T IORD
T BUFEN
Tw
T1
valid
T adr
T CSx
T IOCSx
T IOWR
T BUFEN
T DHZV
T2
T CSx
T IOCSx
T IORD
T BUFEN
T setup
valid
T hold
T2
T CSx
T IOCSx
T IOWR
T BUFEN
valid
T DVHZ
RabbitCore RCM3400

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