Hardware Reference Manual
FLASH CONTROLLER
ERASING FLASH/EE MEMORY
User code can call two flash erase commands, as follows:
Mass erase. This command erases the entire user flash memory. After entering the user protection key into the FEEKEY register, write the
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mass erase command to FEECMD.
Page erase. This command erases the 2 kB flash page selected by FEEADR0L/FEEADR0H. After entering the user protection key into the
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FEEKEY register, load the FEEADR0L/FEEADR0H registers with the page address to be erased. Finally, write the page erase command to
FEECMD. CMDDONE (FEESTA[2]) indicates that the page erase command is completed.
During a page or mass erase sequence, the flash controller and flash block consume extra current for the duration of the flash erase sequence.
Example Code to Mass Erase Flash Memory
pADI_FEE->FEEKEY = 0xF456;
pADI_FEE->FEEKEY = 0xF123;
pADI_FEE->FEECMD = 0x3;
FLASH CONTROLLER PERFORMANCE AND COMMAND DURATION
The flash controller performance and command duration are as follows. These flash timings are not dependent on the clock dividers.
Direct single write access (32-bit location): 46 µs
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Mass erase: 21 ms
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Page erase: 21 ms
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Direct write of a page (512 32-bit locations): 12 ms
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Mass verify for all of user space: 2.05 ms (256 kB and 16 MHz HCLK)
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Sign for all of user space: 2.05 ms (256 kB and 16 MHz HCLK)
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FLASH PROTECTION
There are three types of protection implemented:
Key protection
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Read protection
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Write protection
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Flash Protection: Key Protection
Some of the flash controller registers are key protected to avoid accidental writes to these registers.
The user key is 0xF123F456. It is entered via the 16-bit Key Register 0xF456 first, followed by 0xF123. This key must be entered to run certain
user commands, to write to certain locations in flash, or to enable write access to the setup register. Once entered, the key remains asserted
unless a command is written to the FEECMD register. When the command completes, the key clears automatically. If this key is entered to
enable write access to the setup register or to enable writes to certain locations in flash, it must be cleared by user code afterwards. To clear it,
write any 16-bit value to the key register.
Flash Protection: User Read Protection
User space read protection is provided by disabling serial wire access to ensure that the flash contents cannot be read via the debug or
download interfaces. A user can disable serial wire access by writing 0 to DBG (FEECON1[0]). Note that the FEEKEY register must be loaded
prior to writing to FEECON1.
Serial wire access is disabled while the kernel is running; otherwise, serial wire access can prevent the kernel from running to completion.
When the kernel completes, it enables serial wire access by writing 1 to DBG in the flash FEECON1 register.
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ADuCM362/ADuCM363
// Enter Flash User Protection key
// Load Mass Erase value
Rev. B | 85 of 170
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