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W
I
N
00
~
120
CHARACTERS/S
DIGITAL INPUT
FROM COMPUTE R
DI DS6 7 -15
,.
DATAPHONE
f-<Hoo
DETECTOR
PARITY
ERROR
PARITY
CODE
120
CHAilACTEII/8~
CHECK
TIMING CONTROL
STEERING
STORAGE
STEERING
STORAGE
LOGIC
I--
REGISTER
i-.
LOGIC
r-
REGISTER
*1
*1
*2
*2
I
SHIFT
SHIFT
CONTROL
CONTROL
CIRCUIT
CI RCUIT
r
t
- - -
START OF
DISPLAY
I
MESSAGE
ADDRESS
CONTROL
CONTROL
CIRCUIT
CIRCUIT
I
r - - -
-
2
5
1-,....
211
' - - -
SHIF
IN
SHIFT OUT
f-
TO DISPLAY
LOtte
r
CARRIAGE
IIfTUIIN
CONTROL
CIRCUIT
1
STEERING
LOGIC
f---
*3
---
TO DISPLAY
LOGIC
r
END OF
MESSAGE
CONTROL
CIRCUIT
STORAGE
REGISTER
f.-
*3
SHIFT
CONTROL
CIRCUIT
DIGITAL OUTPUT
STORAGE REGISTER NO. I
l
2~
--..---...----,.-..,
2
3
22 21
20
I
I
I
J
Figure 3 -20.
Logic Circuits in Receive Mode
1-z1t;1
_ H
OQt;1
'en
Wi
I~
NO
ON
I
N
~
.....
o
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