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( 1)
(2)
(3)
S'I;X
ETX
(CR)
DIDS-402-ZM10
Para 3-6.4
After the operator types in the desired message. and the
EOM (end-of-message) key is depressed, the cursor is
.. reset to the first character to be transmitted.
The. operator presses the XMIT key.
The STX (start of text)
code is inserted into register No.1; and the display address
is inserted into register No.2.
When the first character
leaves the delay line and the display logic, it is routed through
steering logic circuit No. 3 into register No.3.
At this time,
register No. 1 contains the STX, register No. 2 contains the
display address, and register No.3, the first character of the
message.
The cursor is automatically stepped right one
character slot when a character from the refresh memory loop
enters register No.3.
Data is shifted into register No.1, bypassing the Z 5 -bit slot
in the register as shown in figure 3-19.
The MSB, or Z6-bit
slot, is examined.
If it contains a logical 1, then a logical 0
is inserted into the 2 5 -bit flip-flop.
If the MSB contains a
logical 0, then a logical 1 is inserted into the 2 5 -bit flip-flop.
In the case of the ETX and carriage return codes, the six bits
are decoded when they are in register No.1; then the correct
seven- bit code is inserted into register No.
1.
The STX code
need not be code converted since the seven-bit code is inserted,
not shifted, into registe r No. 1.
Six-Bit Code
.MSB
LSB
000010
000011
111101
Seven-Bit Code
MSB
LSB
0000010
0000011
0001101
(4)
The dataphone timing control circuit produce s shift
pulses for storage register No. 1 at a rate which is com-
patible with the 1200-bit/second limitation of the telephone
circuits.
The first message character is shifted through
the data word formatting circuit where the parity generator
addition, which will be described in paragraph 3-6. 4c, takes
place.
The start and stop bits are also added here. -The first
message character is amplified in the dataphone driver arid
then sent from the logic circuits into the telephone line.
The
message is circulating through the memory loop at a rate
much higher than the message pick-off rate.
Note that as
soon as storage register No. 1 is emptied, the data in storage
registers No. 2 and 3 are moved ahead one register.
Data
are always moved ahead as soon as possible to make room
for the removal of data from the delay line when the curSor
comes around again.
This process continues until the ETX
code is found.
3-25
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