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DIDS-402-2MlO
Para 3-6.1/3-6.2
3-6. 1 Timing Circuit.
The timing circuit receives pulses from the master
oscillator at a frequency of
1.
1667 MHz.
This clock pulse is counted down by
a 2:1 countdown circuit to give a gate of approximately 583-kHz which is
processed for use as the minor vertical deflection frequency (figures 3-7
and 3-8).
In turn. the resulting frequency is counted down by another 2:1
countdown
circ~it
to provide an approximate 291-kHz gate.
By proper com-
bination of the previous gates. four phases of clock pulses are produced.
The
phase 2. 291-kHz frequency is applied to a 7:1 countdown circuit.
The re-
sulting 41. 667-kHz pulses are 24.0 /-Ls apart; this time represents the character
time.
The 4l. 667-kHz pulses are applied to a 4:1 countdown circuit.
The
resulting 10.42 -kHz pulses are 96. 0 /-Ls apart: this time represents the hori-
zontal line retrace time and is equivalent to four characters.
The 10. 42-kHz
pulses are applied to an 11:1 countdown circuit.
The resulting O. 947-kHz
pulses are 1056 /-LS apart; this time represents the horizontal line time, or
the time taken to paint 40 characters plus horizontal retrace.
The O. 947-kHz
pulses are finally applied to a 14:1 countdown circuit.
The resulting 67. 7-Hz
pulses are 14. 784 ms apart; this time represents the frame time. or the time
taken to paint 13 horizontal lines plus the vertical retrace.
The vertical
retrace time is equivalent to one horizontal line time.
The
A
14 board contains the following individually distinct timing circuits,
in addition to the master oscillator.
a.
A 3-Hz oscillator which supplies timing pulses for cursor blinking
and generates a 6-Hz pulse, the speed at which a character or
function can be repeated when in the cycle mode
b.
A
1200 -Hz oscillator that controls the rate at which information
is clocked out to the telephone lines.
This is described in para-
graph 3-6.4.
3-6.2 Display Refresh.
The display refresh loop consists of delay-line assembly
Al5, delay-line electronics A la, and a character entry register.
The register is
connected in series with the delay line and provides parallel access to the code of
one. character at a time.
The intelligence frame is stored in the delay-line loop
and is read out at the frame frequency to maintain the brightness of the character!
on the Display Terminal screen.
The memory device used consists of an amplifier and a magnetostrictive
torsional delay line which produces a 7.378-ms delay, and an amplifier following
the delay line (figure 3-9).
The information. in pulse form, is applied to the
input transducers, which push one of the magnetostrictive tapes while pulling on
the other.
These tapes, which are welded to the transmission wire, convert
longitudinal motion to torsional motion as the wire twists.
This torsional motion
travels down the cylindrical medium in a helical path at a longitudinal rate of
approximately 4. 5 !.I.s/inch.
When the torsional motion reaches the end of the
wire, it is converted back to longitudinal motion by a push-pull force on the
magnetostrictive tapes.
The output transducer converts this motion into an
electrical pulse.
The pulse is then recirculated in the delay line to obtain the
frame time.
3-13
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