Paradyne 3172 Operator's Manual page 106

Zhone acculink 3172 dsu-csu combo: operators guide
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ACCULINK 3172 and 3174 E1 DSU/CSU
General Configuration Options
Pri Clk Src: NET
Next
NET
DTE
Prt1
Primary Clock Source. Specifies the primary clock source for the E1 DSU/CSU. This selection synchronizes all internal
timing and external interface clocks. Failure of the clock specified by this selection results in automatic fallback to the
secondary clock source.
NET – Configures the Network E1 interface as the primary clock source.
DTE – Configures the DTE Drop/Insert interface as the primary clock source. This selection is not available if the DTE
Drop/Insert interface is disabled. If the DTE Drop/Insert interface is disabled after making this selection, the primary clock
source is changed to NET.
Prt1, 2, 3, 4 – Configures data port 1, 2, 3, or 4 as the primary clock source. Set the same port's Transmit Clock to
External. If you enable EDL for the same port, the external device must provide clocking of 8 kbps less than the expected
data port rate. For example, if you select 64 kbps, the external clock must supply a 56 kbps clock signal.
Int – Configures the internal clock as the primary clock source.
Ext – Configures an external clock (provided through the Clock In connector) as the primary clock source.
NOTE: For Model 3172 DSU/CSUs, Ports 3 and 4 are not available.
Sec Clk Src: NET
Next
NET
DTE
Prt1
Secondary Clock Source. Specifies the secondary clock source for the E1 DSU/CSU. Failure of the clock specified by the
Primary Clock Source selection results in automatic fallback to the secondary clock source. When this occurs, this
selection synchronizes all internal timing and external interface clocks. Failure of the clock specified by the Secondary
Clock Source selection results in automatic fallback to internal clock.
NET – Configures the Network E1 interface as the secondary clock source.
DTE – Configures the DTE Drop/Insert interface as the secondary clock source. This selection is not available if the DTE
Drop/Insert interface is disabled. If the DTE Drop/Insert interface is disabled after making this selection, the secondary
clock source is changed to NET.
Prt1, 2, 3, 4 – Configures data port 1, 2, 3, or 4 as the secondary clock source. Set the same port's Transmit Clock to
External. If you enable EDL for the same port, the external device must provide clocking of 8 kbps less than the expected
data port rate. For example, if you select 64 kbps, the external clock must supply a 56 kbps clock signal.
Ext – Configures an external clock (provided through the Clock In connector) as the secondary clock source.
Disab – Disables the secondary clock source. Failure of the primary clock source results in automatic fallback to the
internal clock.
NOTE: For Model 3172 DSU/CSUs, Ports 3 and 4 are not available.
Clock Rate: 2048
Next
2048
8
Prev
External Clock Rate. Specifies the clock rate when the primary or secondary clock source is configured for external clock
(Ext). This configuration option does not appear when the clock source is not an external clock.
2048 – Sets the input rate of the external clock to 2,048 kHz.
8 – Sets the input rate of the external clock to 8 kHz.
C-12
Table C-6
General Configuration Options
Prt2
Prt3
Prt4
Int
Prt2
Prt3
Prt4
Ext
March 1999
Ext
Prev
Disab
Prev
3170-A2-GB20-30

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