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SY31-0244-2
Revised December 1, 1971
By TNL: SN31-0307
Switch Name
Setting
CE Mode Selector
Alter Storage
Data
'FF'
Storage Test
Run
Address Increment On
This is a 'three exposure' picture. 'Rd Call Wr
Call', and 'Strobe' are shown only for time
reference points.
CORE OUTPUT WRITING '1'
IN ALL BIT POSITIONS
Sync:
Time Base:
Sync Pin:
Pl us External
200 ns/cm
B4A1D11
Signal Name:
Reset
l
Rd Call Wr Call
B4A2B02
f
1 V/cm (8K-16K-32K BSM)
f
l
Strobe Bits 0-8
10 V/cm
B4J4807 (8K-16K BSM)
B4C3D10 (32K BSM)
Core output writing '1' in all bit positions.
(Grounded)
Cores being changed from 'O' to '1' at write
time. Any one address can be positive or
negative.
Cores being changed from '1' to 'O' at read
time. Any one address can be positive or
negative.
Note: Core output measured with a Tektronix* 453 scope as follows:
Channel 1 and 2 set for 100 mV /cm
'Mode' switch set to 'Add'
Channel 2 'Invert' switch pull on
Channel 1 signal pin - B4J4B02 (8K-16K BSM)
B4K4B02 (32K BSM)
Channel 2 signal pin - B4J4002 (8K-16K BSM)
B4K4002 (32K BSM)
Figure 4-14. BSM Waveforms
*Trademark of Tektronix, Incorporated
4-18
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