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1442 SENSE
Op Code
OCode
Operand 1
DA
M
N
0
78
11 12 13
15 16
30
Operand 1
=
2 bytes Direct addressing
f
Byte 1
=
Operand 1 address
70
Operand 1
=
1 byte Indexed by X R- 1
I
Byte 2
=
0..E_erand 1 address-1
BO
Operand 1
=
1 byte Indexed by XR-2
0101
Device address 1442 (5)
0
Must be zero
Low Core Address
High Core Address
011
Byte 2 (EB2)
Byte 1 (EBl)
0
Not assigned
0
Read compare
1 Not assigned
1 Last card indicator
2 Not assigned
2 Punch check
3
Read station jam
3 Data overrun
4 Hopper misfeed
4 I /0 attention
5 Feed clutch
5 No-op latch
6
Punch station jam
6 Feed check
7 Transport jam
7 Invalid card code
001
0 Not assigned
0 All cells on
1 Not assigned
1 Read cells 7, 8, 9
2 Not assigned
2 Read cells 4, 5, 6
3 Punch incremental
3 Read cells 1, 2, 3
drive CB A
4 Punch CB 2
4 Read cells 12, 11, 0
5 Punch CB 1
5 Read emitter
6 Punch incremental
6 Feed CB 2, 3, 4
drive CB B
7 CE diagnostic bit 1
7 Feed CB 1
010
0 Punch echo 9
0 Punch echo 1
1 Punch echo 8
1 Punch echo 0
2 Punch echo 7
2 Punch echo 11
3
Punch echo 6
3
Punch echo 12
4
Punch echo 5
4 Punch echo valid
5
Punch echo 4
5 Not assigned
6 Punch echo 3
6 Punch cell dark
7
Punch echo 2
7 CE diagnostic bit 2
100
Store 1442 DAR
*
xx xx
xx xx
Operand address (sense bytes destinations)
*
Note: All other N codes are invalid.
Figure 1-1 7. 144 2 Sense Bytes
1-20 (1/71)
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