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5. LINKING TO AN ACPU AND AN AJ71 PT32-S3
MELSEC-A
(1)
Reset the switch ON-detected flag
X(n+5) and the reset switch
ON-
detected flag reset signal Y(n+5)
Turns ON (latched) when the reset switch of the A64RDC is moved to
reset.
Turn ON the reset switch ON-detected flag reset signal Y(n+5) with the
sequence program.
Reset switch on the
front of the A64RDC
Reset switch ON-detected ON
flag
X(n+5)
OFF
The request-to-communicate
Reset switch ON-detected ON
flag
reset
Y(n+5)
OFF
registration area is cleared when
both signals are turned ON.
--
Turned ON and OFF by
the sequence program.
(1) If the A64RDC is reset with the reset switch,
it returns to the initial state.
Start the operation from the initial setting.
( 2 )
Since X(n+5) also goes ON after the power is turned ON, be sure to
turn Y(n+5) ON and X(n+5) OFF at the initial stage. Then, execute
programs for the A64RDC.
(2)
READY flag X(n+18)
After turning ON the power or resetting the PC CPU, this signal goes ON
in any NORMAL mode (*1) (except the TEST mode
(*2)).
Power
ON
OFF
TEST
Mode
NORMAL
OFFSET/GAIN
OFFSET
setting switch
SET
READY
X(n+18)
ON
OFF
I
h
GAIN
1
(3) Disconnection detection flag (A64RD3C: X(n+l9) to X(n+l c), A64RD4C:
X(n+l9) goes ON when a disconnection is detected.
It remains OFF if no disconnection is detected.
IREMARKJ
(1) *1.... Normal mode is established when test mode terminals on an A64RDC are not con-
nected.
(2) *2
....
Test mode is established when test mode terminals on an A64RDC are connected
(shorted). Error compensation can be done.
(3) See Section 2.3.5 for disconnection detection.
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