Appendix B:parallel Port Test Jig - Sony NWS-1510 Service Manual

Appendix B: Parallel Port Test Jig
Tnis appendix describes the test jig which must be
connected to the parallel port for performing self diagnostics
on the serial circuit.
1) Parallel board pin assignments
11
I
Pin No. Si nal I/O direction
Pin No. Si nal I/O direction
I
1
I
CSTRB
I -->
11
8
I
CENT D6
I
-->
2
I
CEN'r no
I
--> !
I
9
I
CEN'r D7
I
-->
3
I
cEwr
n1
I --> II
10
I I
4
I
CENT
D2
I
--> II
11
I
C busy I
<--
5
I
cEwr
D3
I
-->
11
12
I I
6
I
CENT D4
I
-->
11
13
I
C fault
I
<--
7
I
CEN'l"' DS
I
-->
II
14
I
GND
I
-->:
Output signal
<--:
Input signal
2)
Parallel port test jig wiring
+5V
+5V
+5V
4.7KQx8
CENT DO
4
DO
Vee
18
Vee
18
CENT Dl
3
DI
s
CLR
CENT D2
2
D2 GND
8 8
GND
LOAD
CENT D3
1
D3 T
10
15
LS151 LS163
p
T
CENT D4
D4
CENT D5
14
D5
c
•
12
Oe
D
•
CENT D6
u
D6 B
10
u
Ob
c 5
CENT D7
12
D7 A
11 14
Oa B
4
CK A
3
y
C busy
5 2
CST RB
LS14
(7-Pin: GND/ 14-Pin: +5V)
NWS-1510/1530/1580
4-33