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data moved from FIFO#l to FIF0#2 {the second byte).
Any
additional data received when FIFO#l and FIF0#2 already both
have data is lost.
The following flowchart shows the process with which the CPU
reads keyboard/mouse data after the interrupt from PARK is
received.
<CPU>
<MEMC>
<
CDECR >
IPLO - 2 output
<PARK>
Interrupt issued
(INTMSKB)
Interrupt received - - - - - - - - - - - - -
STAT1 address
output
AS= "L"
CPD
DSACKO
Data latched
AS= "H"
End of cycle
PORT output
PORT negated
IOSEL output
IOBSEL/
~---
STAT1 data output
IOD
DSACKIO output
IOSEL negated
IOBSEL/
~---.
STAT1 data/
DSACKIO negated
Keyboard/ mouse interrupt evaluated based on
contents of ST AT1
NWS-1510/1530/1580
3-37
RXD
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