Powering Up The Eval-Ade9113Ktz Boards; Analog Inputs - Analog Devices EVAL-ADE9113 User Manual

Evaluation board for the ade9113 isolated sigma delta adc with spi
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User Guide
EVALUATION BOARD HARDWARE
POWERING UP THE EVAL-ADE9113KTZ
BOARDS
When using the SDP-B setup, the boards receive power via the
USB cable that is connected to the PC. A 3.3 V regulator then
powers the SDP-B board microcontroller and the ADCs of the
ADE9113
populating the evaluation board. No additional power
source is required for the EVAL-ADE9113KTZ boards.
When using the MCU adapter board, power is passed to the MCU
adapter board and the EVAL-ADE9113EBZ from the MCU board
plugged into the shield form factor headers. No additional power
source is required; however, the header on the MCU adapter board
can be used to wire up a custom connection to an external MCU.
If power is not available through the MCU adapter board, the
EVAL-ADE9113EBZ has two test points to apply an external 5 V
supply, a positive test point (+V), and a negative test point (DGND).

ANALOG INPUTS

Current and voltage signals are connected at the test pins placed
on the EVAL-ADE9113EBZ. All analog input signals are filtered
using the on-board antialiasing filters before the signals are con-
nected to the ADCs of the ADE9113. The components used on the
EVAL-ADE9113EBZ are the values recommended for use with the
ADE9113.
analog.com
Figure 3. EVAL-ADE9113KTZ Evaluation Kit Connection Diagram
Current Sense Inputs (I1P_x and I1M_x Test
Pins)
Every ADE9113 measures the voltage across a shunt at its IP and
IM pins.
Figure 4
shows the structure used for the Phase A current.
The R11A and C5A and R12A and C6A RC networks are the antia-
liasing filters. The default corner frequency of these low-pass filters
(LPFs) is 7.073 kHz (150 Ω and 150 nF). These filters can easily be
adjusted by replacing the components on the EVAL-ADE9113EBZ.
The E3, E4, and E5 ferrite beads filter any high frequency noise
that may be induced into the wires.
The absolute maximum voltage on the IP and IM pins of the
ADE9113 is ±1.4 V. The maximum signal level permissible at the
IP pin of the ADE9113 is ±0.040625 V peak, which is the full-scale
input level of ±0.03125 V with room for a common mode. The signal
range must not exceed ±0.040625 V, with respect to AGND_x, for
specified operation.
The Phase A shunt is connected between the I1P_A and I1M_A
test pins.
The other current channels (that is, Phase B, Phase C, and Phase
N) have an identical input structure. The Phase B shunt is connect-
ed between the I1P_B and I1M_B test pins, the Phase C shunt is
connected between I1P_C and I1M_C, and the Phase N shunt is
connected between I1P_N and I1M_N.
The shunt maximum value is a function of the maximum current to
be measured on every phase, as follows:
EVAL-ADE9113
Rev. 0 | 5 of 18

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