Quectel SC262R Series Hardware Design page 62

CSI1_LN3_N
CSI1_LN3_P
CSI1_LN2_N
CSI1_LN2_P
CSI0_CLK_N
CSI0_CLK_P
CSI0_LN0_N
CSI0_LN0_P
CSI0_LN1_N
CSI0_LN1_P
CSI0_LN2_N
CSI0_LN2_P
CSI0_LN3_N
CSI0_LN3_P
CAM0_MCLK
CAM1_MCLK
CAM0_RST
CAM0_PWDN
CAM1_RST
CAM1_PWDN
CAM_I2C_SCL
CAM_I2C_SDA
CAM2_MCLK
CAM2_RST
CAM2_PWDN
SC262R_Series_Hardware_Design
70 AI
71 AI
72 AI
73 AI
157 AI
196 AI
158 AI
197 AI
159 AI
198 AI
160 AI
199 AI
161 AI
200 AI
74 DO
75 DO
79 DO
80 DO
81 DO
82 DO
83 OD
84 OD
165 DO
164 DO
163 DO
MIPI CSI1 lane 3 data (-)
MIPI CSI1 lane 3 data (+)
MIPI CSI1 lane 2 data (-)
MIPI CSI1 lane 2 data (+)
MIPI CSI0 clock (-)
MIPI CSI0 clock (+)
MIPI CSI0 lane 0 data (-)
MIPI CSI0 lane 0 data (+)
MIPI CSI0 lane 1 data (-)
MIPI CSI0 lane 1 data (+)
MIPI CSI0 lane 2 data (-)
MIPI CSI0 lane 2 data (+)
MIPI CSI0 lane 3 data (-)
MIPI CSI0 lane 3 data (+)
Master clock of camera0
Master clock of camera1
Reset of camera0
Power down of camera0
Reset of camera1
Power down of camera1
I2C clock of front and rear
cameras
I2C data of front and rear
cameras
Master clock of camera2
Reset of camera2
Power down of camera2
Smart Module Series
1.8 V power domain.
Externally pull them
up to 1.8 V.
1.8 V power domain.
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