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1080p/24sF
A Fram e C andidate
A Fram e O ffset
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Figure 7: RP188 Pulldown Sequence A Frame Alignment – 1080p/23.98sF Input Video
6.3.3. Setting up the Video Output Timing
The output stage of the downconverter contains a frame buffer and a line buffer so that the output video
can be timed with respect to the colour black reference applied to the GENLOCK input loop. In the
absence of a genlock signal the output video will be timed with respect to the incoming HD Video.
There are separate controls to adjust the horizontal and vertical timing of the output video for both the 525
and 625 line video standards. The controls work in the same way for each video standard, except that the
V Phase Offset control has valid values from 1 to the number of lines per frame in the respective video
standard.
The V Phase Offset and H Phase Offset adjustments are REAL TIME
!
ADJUSTMENTS and will affect the output video timing immediately.
settings should not be adjusted when the output video is in the broadcast chain.
6.3.3.1. Calculating the Delay through the Downconverter.
The delay through the downconverter is dependent on the video input format, the downconverter
processing mode and the H and V phase settings. Table 7 and Table 8 show the default and maximum
and minimum delays for each video standard when locked to the genlock input and the input video
respectively.
The default delay will be when the V Phase Offset and H Phase Offset parameters are set to zero. When
increasing the V Phase Offset value causes it to go beyond the limit of the frame buffer (the line value
shown in the maximum delay column), the V Phase Offset will wrap to the beginning of the frame buffer,
resulting in a loss of one frame of throughput delay between the HD input and the video output. When
increasing the H Phase Offset value causes it to go beyond the limit of the line buffer (the sample value
shown in the maximum delay column), the H Phase Offset will wrap to the beginning of the line buffer.
Thus, the minimum delay is achieved when both the V Phase Offset and H Phase Offset wrap to the
beginning of the frame and line buffers and will occur when the V Phase Offset is set to the line value
shown and the H Phase Offset is set to the sample value shown in the minimum delay columns. The
maximum delay is achieved one line before the V Phase Offset wraps to the beginning of the frame buffer
and one sample before the H Phase Offset wraps to the beginning of the line buffer and will occur when
the V Phase Offset is set to the line value shown and the H Phase Offset is set to the sample value shown
in the maximum delay columns.
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Revision 1.2
7712HDC HD Broadcast Quality Down Converter
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7700 MultiFrame Manual
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These
7712HDC-15
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