Programmable Clock Output - Atmel AT89C5130A-M Manual

Figure 13-1. Auto-reload Mode Up/Down Counter (DCEN = 1)
F
CLK PERIPH
13.2

Programmable Clock Output

AT89C5130A/31A-M
54
: 6
In the Clock-out mode, Timer 2 operates as a 50%-duty-cycle, programmable clock generator
(See Figure 13-2). The input clock increments TL2 at frequency F
edly counts to overflow from a loaded value. At overflow, the contents of RCAP2H and RCAP2L
registers are loaded into TH2 and TL2. In this mode, Timer 2 overflows do not generate inter-
rupts. The following formula gives the Clock-out frequency as a function of the system oscillator
frequency and the value in the RCAP2H and RCAP2L registers
Clock OutFrequency –
For a 16 MHz system clock, Timer 2 has a programmable frequency range of 61 Hz
16)
(F /2 to 4 MHz (F
CLK PERIPH
(P1.0).
Timer 2 is programmed for the Clock-out mode as follows:
• Set T2OE bit in T2MOD register.
• Clear C/T2 bit in T2CON register.
• Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L
registers.
• Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value
or a different one depending on the application.
• To start the timer, set TR2 run control bit in T2CON register.
0
1
T2
C/T2
T2CON
T2CON
(DOWN COUNTING RELOAD VALUE)
FFh FFh
(8-bit) (8-bit)
TL2 TH2
(8-bit) (8-bit)
RCAP2L RCAP2H
(8-bit)
(8-bit)
(UP COUNTING RELOAD VALUE)
= ---------------------------------------------------------------------------------------- -
4 × ( 65536 RCAP2H
/4). The generated clock signal is brought out to T2 pin
CLK PERIPH
TR2
T2EX:
if DCEN = 1, 1 = UP
if DCEN = 1, 0 = DOWN
if DCEN = 0, up counting
TOGGLE T2CON
EXF2
Timer 2
TF2
INTERRUPT
T2CON
/2. The timer repeat-
CLK PERIPH
F
CLKPERIPH
– ⁄ RCAP2L )
4337K–USB–04/08