Supermicro X10QBL-4CT User Manual page 86

X10QBL-4CT/X10QBL-4 User's Manual
QPI Per Socket Configuration
CPU 1/CPU 2
IO Resource Allocation Ratio
Use this feature to set the IO resource-allocation ratio (from 0-8). The default
setting is 3.
MMIOL Resource Allocation Ratio
Use this feature to set the Memory-Mapped IO resource-allocation ratio (from
0-8). The CPU1 default setting is 3, and for CPU2 is 1.
IIO UniPhy Disable
Select Yes to hide the entire UNIFY in the L2 cache. The options are No, Yes,
and Yes w/Memory Hot Add.
Memory Configuration
This section displays the following Integrated Memory Controller (IMC) informa-
tion.
DDR Speed
Use this feature to force a DDR4 memory module to run at a frequency other
than what is specified in the specification. The options are Auto, 1067, 1333,
1600, 1867, and 2133.
ODT (On-Die Termination) Timing Mode
Use this feature to configure the timing mode setting for the ODT (On-Die Ter-
mination) where the termination resistor for impedance matching in transmission
lines is located inside a chip instead of on a printed circuit board. The options
are Aggressive Timing and Conservative Timing.
MxB Rank Sharing Mapping
Use this feature to select the address-mapping setting for memory-rank sharing
to enhance extended multimedia platform performance. The options are Maxi-
mum Performance and Maximum Margin.
LRDIMM (Load-Reduction DIMM) Module Delay
When this item is set to Disabled, the MRC (Memory Regulator Controller) will
not use SPD bytes 90-95 for module delay on LRDIMM memory. The options
are Disabled and Auto.
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