Part 1.3: Ddr4 Dram - Alinx ACU2CG User Manual

 Static storage interface, support NAND, 2xQuad-SPI FLASH.
 High-speed connection interface, support PCIe Gen2 x 4, 2 x USB3.0,
Sata 3.1, Display Port, 4 x Tri-mode Gigabit Ethernet
 Common connection interfaces: 2 x USB2.0, 2 x SD/SDIO, 2 x UART,
2 x CAN 2.0B, 2 x I2C, 2 x SPI, 4 x 32b GPIO
 Power management: Supports the division of four parts of power
supply Full/Low/PL/Battery.
 Encryption algorithm: support RSA, AES and SHA.
 System monitoring: 10-bit 1Mbps AD sampling for temperature and
voltage detection.
The main parameters of the PL logic part are as follows:
 Logic Cells: 103K
 Flip-flops: 94K
 Look-up-tables (LUTs): 47K
 Block RAM: 5.3MB
 Clock Management Units (CMTs): 3
 18x25MACCs: 240
XCZU2CG-1SFVC784E chip speed grade is -1, industrial grade, package
is SFVC784

Part 1.3: DDR4 DRAM

The ACU2CG core board is equipped with 4 Micron (Micron) 512MB
DDR4 chips, model is PANGO CXDQ2BFAM-CG (Compatible with
MT40A256M16GE-083E), to form a 64-bit data bus bandwidth and 2GB
capacity. The maximum operating speed of the DDR4 SDRAM on the PS side
can reach 1200MHz (data rate 2400Mbps), and the 4 DDR4 storage systems
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